Patents by Inventor Robert W. Berner

Robert W. Berner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7087143
    Abstract: A workpiece processing station is disclosed. The workpiece processing station has particular applicability in an electroplating process for semiconductor wafers. The apparatus includes a work processing bowl having an outer bowl and an inner cup positioned at a location slightly below the upper rim of the bowl. An annular space is provided between the sides of the processing bowl and the fluid cup. Fluid is provided to the fluid cup through an opening in the bottom of the fluid cup. The fluid overflows the fluid cup and drains down the open annular space between the process bowl and the fluid cup and passes through the opening in the bottom of the process bowl and into a fluid reservoir. A reservoir is preferably used as both the supply and the return for the process fluid.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: August 8, 2006
    Assignee: Semitool, Inc.
    Inventors: Wayne J. Schmidt, Robert W. Berner, Daniel J. Woodruff
  • Patent number: 7074246
    Abstract: The present invention provides for a semiconductor workpiece processing tool and methods for handling semiconductor workpiece therein. The semiconductor workpiece processing tool preferably includes an interface section comprising at least one interface module and a processing section comprising a plurality of processing modules for processing the semiconductor workpieces. The semiconductor workpiece processing tool may have a conveyor for transferring the semiconductor workpieces between the interface modules and the processing modules.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: July 11, 2006
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Daniel J. Woodruff, Wayne J. Schmidt, Kevin W. Coyle, Vladimir Zila, Worm Lund
  • Patent number: 6960257
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: November 1, 2005
    Assignee: Semitool, Inc.
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright, Darryl S. Byle
  • Patent number: 6843894
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: January 18, 2005
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Joseph J. Fatula, Jr., Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Patent number: 6833035
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: December 21, 2004
    Assignee: Semitool, Inc.
    Inventors: Raymond F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright
  • Patent number: 6805778
    Abstract: Methods used in semiconductor electroplating systems, such as for plating copper, onto a semiconductor wafer or other semiconductor workpiece. The methods apply to patterned metal layers plated onto a seed layer which is partially protected by an overlying photoresist or other coating. The methods employ an electrode assembly which has a boot which seals about a contact face of the electrode. The sealing is performed by engaging the seal against photoresist to prevent corrosion of the seal layer. The area enclosed by the sealing includes a via which is surrounded by the seal. The electrode contact extends through the via to provide electrical contact with the metallic seed layer. Plating of copper or other metal proceeds at exposed seed layer areas.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: October 19, 2004
    Assignee: Semitool, Inc.
    Inventors: Robert W. Batz, Jr., Kenneth C. Haugan, Harry J. Geyer, Robert W. Berner
  • Publication number: 20040055879
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 25, 2004
    Inventors: Robert W. Berner, Joseph J. Fatula, Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Publication number: 20040035707
    Abstract: Methods used in semiconductor electroplating systems, such as for plating copper, onto a semiconductor wafer or other semiconductor workpiece. The methods apply to patterned metal layers plated onto a seed layer which is partially protected by an overlying photoresist or other coating. The methods employ an electrode assembly which has a boot which seals about a contact face of the electrode. The sealing is performed by engaging the seal against photoresist to prevent corrosion of the seal layer. The area enclosed by the sealing includes a via which is surrounded by the seal. The electrode contact extends through the via to provide electrical contact with the metallic seed layer. Plating of copper or other metal proceeds at exposed seed layer areas.
    Type: Application
    Filed: April 7, 2003
    Publication date: February 26, 2004
    Inventors: Robert W. Batz, Kenneth C. Haugan, Harry J. Geyer, Robert W. Berner
  • Publication number: 20030202871
    Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.
    Type: Application
    Filed: May 7, 2003
    Publication date: October 30, 2003
    Inventors: Raymon F. Thompson, Robert W. Berner, Gary L. Curtis, Stephen P. Culliton, Blaine G. Wright, Darryl S. Byle
  • Patent number: 6627051
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: September 30, 2003
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Joseph J. Fatula, Jr., Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Publication number: 20030029732
    Abstract: A semiconductor workpiece holder used in electroplating systems for plating metal layers, such as copper, onto a semiconductor workpiece. The workpiece holder includes electrodes which extend and are partially submerged in a liquid plating bath. The electrodes have a contact face which bears against the workpiece and conducts current therebetween. The submersible portions of the electrodes are partially covered with a dielectric layer or surface and partially covered with a conductive layer or surface. The conductive surface is preferably spaced from the contact face and placed in direct contact with the plating bath to allow diversion of some of the plating current directly between the electrode and plating bath. Associated methods are also described.
    Type: Application
    Filed: June 10, 2002
    Publication date: February 13, 2003
    Inventors: Thomas L. Ritzdorf, Jeffrey I. Turner, Robert W. Berner
  • Publication number: 20020194716
    Abstract: The present invention provides for a semiconductor workpiece processing tool and methods for handling semiconductor workpiece therein. The semiconductor workpiece processing tool preferably includes an interface section comprising at least one interface module and a processing section comprising a plurality of processing modules for processing the semiconductor workpieces. The semiconductor workpiece processing tool may have a conveyor for transferring the semiconductor workpieces between the interface modules and the processing modules.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 26, 2002
    Inventors: Robert W. Berner, Daniel J. Woodruff, Wayne J. Schmidt, Kevin W. Coyle, Vladimir Zila, Worm Lund
  • Patent number: 6461494
    Abstract: Methods used in semiconductor electroplating systems, such as for plating copper, onto a semiconductor wafer or other semiconductor workpiece. The methods apply to patterned metal layers plated onto seed layer which is partially protected by an overlying photoresist or other coating. The methods employ an electrode assembly which has a boot which seals about a contact face of the electrode. The sealing is performed by engaging the seal against photoresist to prevent corrosion of the seal layer. The area enclosed by the sealing includes a via which is surrounded by the seal. The electrode contact extends through the via to provide electrical contact with the metallic seed layer. Plating of copper or other metal proceeds at exposed seed layer areas.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: October 8, 2002
    Assignee: Semitool, Inc.
    Inventors: Robert W. Batz, Jr., Kenneth C. Haugan, Harry J. Geyer, Robert W. Berner
  • Patent number: 6454926
    Abstract: A semiconductor workpiece holder used in electroplating systems for plating metal layers, such as copper, onto a semiconductor workpiece. The workpiece holder includes electrodes which extend and are partially submerged in a liquid plating bath. The electrodes have a contact face which bears against the workpiece and conducts current therebetween. The submersible portions of the electrodes are partially covered with a dielectric layer or surface and partially covered with a conductive layer or surface. The conductive surface is preferably spaced from the contact face and placed in direct contact with the plating bath to allow diversion of some of the plating current directly between the electrode and plating bath. Associated methods are also described.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: September 24, 2002
    Assignee: Semitool Inc.
    Inventors: Thomas L. Ritzdorf, Jeffrey I. Turner, Robert W. Berner
  • Patent number: 6440178
    Abstract: The present invention provides for a semiconductor workpiece processing tool and methods for handling semiconductor workpiece therein. The semiconductor workpiece processing tool preferably includes an interface section comprising at least one interface module and a processing section comprising a plurality of processing modules for processing the semiconductor workpieces. The semiconductor workpiece processing tool may have a conveyor for transferring the semiconductor workpieces between the interface modules and the processing modules.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: August 27, 2002
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Daniel J. Woodruff, Wayne J. Schmidt, Kevin W. Coyle, Vladimir Zila, Worm Lund
  • Publication number: 20020003084
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Application
    Filed: July 20, 2001
    Publication date: January 10, 2002
    Inventors: Robert W. Berner, Joseph J. Fatula, Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Patent number: 6322674
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: November 27, 2001
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Joseph J. Fatula, Jr., Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Patent number: 6319841
    Abstract: Processing methods and systems using vapor phase processing streams made from a liquid phase source and feed gas. Some versions use multiple liquid sources and multiple vapor generators which each produce vapors which are mixed. Some of the vapor generators use metering pumps to inject a controlled flow of liquid into a controlled flow of feed gas. In some embodiments the vapors are exsiccated to reduce saturation before being introduced as a processing chamber vapor mixture into a processing chamber. The semiconductor pieces are preferably rotated within the processing chamber and can be processed in batches.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: November 20, 2001
    Assignee: Semitool, Inc.
    Inventors: Eric J. Bergman, Robert W. Berner, David Oberlitner
  • Publication number: 20010030101
    Abstract: The present invention provides for a semiconductor workpiece processing tool and methods for handling semiconductor workpiece therein. The semiconductor workpiece processing tool preferably includes an interface section comprising at least one interface module and a processing section comprising a plurality of processing modules for processing the semiconductor workpieces. The semiconductor workpiece processing tool may have a conveyor for transferring the semiconductor workpieces between the interface modules and the processing modules.
    Type: Application
    Filed: March 16, 2001
    Publication date: October 18, 2001
    Inventors: Robert W. Berner, Daniel J. Woodruff, Wayne J. Schmidt, Kevin W. Coyle, Vladimir Zila, Worm Lund
  • Patent number: 6203582
    Abstract: The present invention provides for a semiconductor workpiece processing tool. The semiconductor workpiece processing tool includes an interface section comprising at least one interface module and a processing section comprising a plurality of processing modules for processing the semiconductor workpieces. The semiconductor workpiece processing tool has a conveyor for transferring the semiconductor workpieces between the interface modules and the processing modules.
    Type: Grant
    Filed: July 15, 1996
    Date of Patent: March 20, 2001
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Daniel J. Woodruff, Wayne J. Schmidt, Kevin W. Coyle, Vladimir Zila, Worm Lund