Patents by Inventor Robert W. Daywitt

Robert W. Daywitt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Defect insertion testability mode for IDDQ testing methods
    Patent number: 5869977
    Abstract: A Defect Insertion Testability Mode for IDDQ Testing to detect defects in a semiconductor device and for accuracy correction during testing. In one embodiment of the present invention a screen condition and a known defect current are selected for the device under test (DUT). The DUT is screened without a known defect current being inserted and then is screened again with a known defect current inserted. The results of screening the DUT with and without the known defect current are then compared and the screen condition is adjusted based upon this comparison in order to increase the accuracy of the IDDQ test.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: February 9, 1999
    Assignee: Intel Corporation
    Inventors: Jeffrey C. Kalb, Jr., Robert W. Daywitt