Abstract: A processing node of a server rack includes a processor to generate processing node management requests and to process responses to the node management requests, and a communication module to receive the processing node management requests, to transmit over a communication link to a management controller of the server rack external to the processing node a processing node management request, to receive over the communication link from the management controller processing node management information, and to transmit the processing node management information to the processor.

Abstract: A method of reducing execution jitter includes a processor having several cores and control logic that receives core configuration parameters. Control logic determines if a first set of cores are selected to be disabled. If none of the cores is selected to be disabled, the control logic determines if a second set of cores is selected to be jitter controlled. If the second set of cores is selected to be jitter controlled, the second set of cores is set to a first operating state. If the first set of cores is selected to be disabled, the control logic determines a second operating state for a third set of enabled cores. The control logic determines if the third set of enabled cores is jitter controlled, and if the third set of enabled cores is jitter controlled, the control logic sets the third set of enabled cores to the second operating state.

Abstract: A system includes first and second processing nodes and a network switch coupled to the first and second processing nodes via respective first and second interfaces. The network switch includes a management controller coupled to the interfaces to provide management functions to the processing nodes, first and second network interfaces coupled respectively to the first and second interfaces to provide network access for the processing nodes, a message passing interface between the first processing node and the second processing node, a storage interface coupled to the first and second interfaces to provide a storage capacity to the processing nodes, and a remote component controller coupled to the interfaces.

Abstract: A network interface controller includes a plurality of host interfaces configured to communicate with a plurality of processing nodes, a plurality of network interfaces configured to provide network communication for the processing nodes to a network, and a shared resource configured to provide link based services and stateless offload services for the processing nodes when communicating with the network.

Abstract: An information handling system (IHS) is disclosed wherein the system includes a processor associated with at least one performance state (P-state), and a memory in communication with the processor. The memory is operable to store a virtualization software and a basic input/out system (BIOS). The BIOS is configured to report a parameter of the P-state to the virtualization software. In addition, the BIOS is configured to transition the processor into a desired P-state. A method for managing performance states in an information handling system (IHS) is further disclosed wherein the method includes providing a basic input/output system (BIOS) in communication with a processor, the processor associated with an at least one performance state (P-state) and reporting a parameter of the at least one P-state to a virtualization software via the BIOS. The method further includes transitioning the processor to a desired P-state via the BIOS.

Abstract: A method of reducing execution jitter includes a processor having several cores and control logic that receives core configuration parameters. Control logic determines if a first set of cores are selected to be disabled. If none of the cores is selected to be disabled, the control logic determines if a second set of cores is selected to be jitter controlled. If the second set of cores is selected to be jitter controlled, the second set of cores is set to a first operating state. If the first set of cores is selected to be disabled, the control logic determines a second operating state for a third set of enabled cores. The control logic determines if the third set of enabled cores is jitter controlled, and if the third set of enabled cores is jitter controlled, the control logic sets the third set of enabled cores to the second operating state.

Abstract: A remote component controller of a server rack includes a real time clock information unit to maintain real clock time and to respond to requests for real time clock information, and a communication module to receive over a communication link a request from a processing node of the server rack for real time clock information, to forward the request to the real time clock information unit, to receive from the real time clock information unit a response to the request, and to transmit the response to the request to the processing node over the communication link.

Abstract: A system may include a chassis and a chassis backplane integral to the chassis. The chassis may be configured to receive a plurality of server backplanes, each server backplane integral to a respective modular sled configured to removably engage with the chassis. The server backplane may include a plurality of information handling systems, a switch communicatively coupled to each of the information handling systems, at least one external network port communicatively coupled to the switch for coupling the switch to an external network external to the chassis, and a plurality of internal network ports communicatively coupled to the switch. The chassis backplane may have a topology configured to couple the switch from each server backplane to switches from two or more other server backplanes such that an internal chassis network is formed comprising the information handling systems and switches of the plurality of server backplanes engaged with the chassis.

Abstract: Systems and methods are disclosed that may be implemented to dynamically allocate relative power consumption between a group of multiple information handling system nodes that share a common (e.g., capacity-limited) power supply or source of power. The relative power consumption of the multiple information handling system nodes may be adjusted based on real time power consumption of each of the individual information handling system nodes, as well as the need for additional power by one or more of the individual information handling system nodes. A group of multiple information handling system nodes may dynamically communicate power usage characteristics in a distributed manner between themselves to implement a peer-to-peer acknowledgement architecture, or alternatively may communicate power usage characteristics to a centralized power manager.

Abstract: A network interface controller includes a plurality of host interfaces configured to communicate with a plurality of processing nodes, a plurality of network interfaces configured to provide network communication for the processing nodes to a network, and a shared resource configured to provide link based services and stateless offload services for the processing nodes when communicating with the network.

Abstract: A system includes first and second processing nodes and a network switch coupled to the first and second processing nodes via respective first and second interfaces. The network switch includes a management controller coupled to the interfaces to provide management functions to the processing nodes, first and second network interfaces coupled respectively to the first and second interfaces to provide network access for the processing nodes, a message passing interface between the first processing node and the second processing node, a storage interface coupled to the first and second interfaces to provide a storage capacity to the processing nodes, and a remote component controller coupled to the interfaces.

Abstract: A processing node of a server rack includes a processor to generate processing node management requests and to process responses to the node management requests, and a communication module to receive the processing node management requests, to transmit over a communication link to a management controller of the server rack external to the processing node a processing node management request, to receive over the communication link from the management controller processing node management information, and to transmit the processing node management information to the processor.

Abstract: A remote component controller of a server rack includes a real time clock information unit to maintain real clock time and to respond to requests for real time clock information, and a communication module to receive over a communication link a request from a processing node of the server rack for real time clock information, to forward the request to the real time clock information unit, to receive from the real time clock information unit a response to the request, and to transmit the response to the request to the processing node over the communication link.

Abstract: An input/output (I/O) device includes a management controller interface, a plurality of network switching interfaces, a storage interface, a component controller interface, and a plurality of multifunction modules. The multifunction modules further include a processing node interface, a first endpoint coupled to the management controller interface, a second endpoint coupled to one of the plurality of network switching interfaces, a third endpoint coupled to a remote direct memory access (RDMA) block, a fourth endpoint coupled to the storage interface, and a fifth endpoint coupled to the component controller interface.

Abstract: Systems and methods are disclosed that may be implemented to dynamically allocate relative power consumption between a group of multiple information handling system nodes that share a common (e.g., capacity-limited) power supply or source of power. The relative power consumption of the multiple information handling system nodes may be adjusted based on real time power consumption of each of the individual information handling system nodes, as well as the need for additional power by one or more of the individual information handling system nodes. A group of multiple information handling system nodes may dynamically communicate power usage characteristics in a distributed manner between themselves to implement a peer-to-peer acknowledgement architecture, or alternatively may communicate power usage characteristics to a centralized power manager.

Abstract: A system may include a chassis and a chassis backplane integral to the chassis. The chassis may be configured to receive a plurality of server backplanes, each server backplane integral to a respective modular sled configured to removably engage with the chassis. The server backplane may include a plurality of information handling systems, a switch communicatively coupled to each of the information handling systems, at least one external network port communicatively coupled to the switch for coupling the switch to an external network external to the chassis, and a plurality of internal network ports communicatively coupled to the switch. The chassis backplane may have a topology configured to couple the switch from each server backplane to switches from two or more other server backplanes such that an internal chassis network is formed comprising the information handling systems and switches of the plurality of server backplanes engaged with the chassis.

Abstract: Systems and methods are disclosed for power management in information handling systems using processor performance data to validate changes to processor performance states. Processor utilization data and processor performance data is obtained during system operation. The processor utilization data is analyzed to determine a desired performance state for the processor. Before setting the actual performance state of the processor to this desired performance state, however, processor performance data is analyzed to determine if prior changes to the performance state have been effective. The performance state of the processor is then changed are maintained based upon this additional performance verification analysis.

Abstract: An information handling system (IHS) is disclosed wherein the system includes a processor associated with at least one performance state (P-state), and a memory in communication with the processor. The memory is operable to store a virtualization software and a basic input/out system (BIOS). The BIOS is configured to report a parameter of the P-state to the virtualization software. In addition, the BIOS is configured to transition the processor into a desired P-state. A method for managing performance states in an information handling system (IHS) is further disclosed wherein the method includes providing a basic input/output system (BIOS) in communication with a processor, the processor associated with an at least one performance state (P-state) and reporting a parameter of the at least one P-state to a virtualization software via the BIOS. The method further includes transitioning the processor to a desired P-state via the BIOS.

Abstract: Systems and methods are disclosed for power management in information handling systems using processor performance data to validate changes to processor performance states. Processor utilization data and processor performance data is obtained during system operation. The processor utilization data is analyzed to determine a desired performance state for the processor. Before setting the actual performance state of the processor to this desired performance state, however, processor performance data is analyzed to determine if prior changes to the performance state have been effective. The performance state of the processor is then changed are maintained based upon this additional performance verification analysis.

Abstract: A system and method for controlling relays. The method may comprise receiving one or more input commands for a plurality of relays, with the plurality of relays including a first relay, and a last relay, initiating actuation of the first relay after receiving the input relay commands, and initiating actuation of the last relay after initiating actuation of the first relay. Initiating actuation of the last relay does not wait for a debounce of the first relay. The method waits a debounce period after initiating actuation of the last relay. The debounce period operates to debounce the last relay and the first relay. One or more second relays may also be included in the debounce sequence. The relays may be latching or non-latching relays. The method may determine if another relay is required to be actuated after initiating actuation of each relay. One of the input commands may include a debounce mode input. A delayed debounce mode debounces the plurality of relays only after the last relay has been actuated.