Abstract: A method of forming silicon integrated circuits offers radiation resistance together with a high degree of planarity, including a thin field oxide together with a set of conductive plates over the field region combine to suppress the formation of parasitic transistors. In one embodiment, a silicon substrate is etched to form trenches and is then covered with a thin barrier layer, (410) of high quality thermal oxide. A polysilicon layer (423) is next conformally deposited and planarized until the barrier layer (410) is exposed, followed by an oxidation step for isolation or gate oxide formation.