Abstract: A cortronic neural network defines connections between neurons in a number of regions using target lists, which identify the output connections of each neuron and the connection strength. Neurons are preferably sparsely interconnected between regions. Training of connection weights employs a three stage process, which involves computation of the contribution to the input intensity of each neuron by every currently active neuron, a competition process that determines the next set of active neurons based on their current input intensity, and a weight adjustment process that updates and normalizes the connection weights based on which neurons won the competition process, and their connectivity with other winning neurons.

Abstract: A systolic array of processing elements is connected to receive weight inputs and multiplexed data inputs for operation in two dimension convolution mode, or fully-connected neural network mode, or in cooperative, competitive neural network mode. Feature vector or two-dimensional image data is retrieved from external data memory and is transformed via input look-up table to input data for the systolic array. The convoluted image or outputs from the systolic array are scaled and transformed via output look-up table for storage in the external data memory. The architecture of the system allows it to calculate convolutions of any size within the same physical systolic array, merely by adjusting the programs that control the data flow.

Abstract: A systolic array of processing elements is connected to receive weight inputs and multiplexed data inputs for operation in feedforward, partially-- or fully-connected neural network mode or in cooperative, competitive neural network mode. Feature vector or two-dimensional image data is retrieved from external data memory and is transformed via input look-up table to input data for the systolic array that performs a convolution with kernal values as weight inputs. The convoluted image or neuron outputs from the systolic array are scaled and transformed via output look-up table for storage in the external data memory.

Abstract: An image-compression system, wherein the image consists of a planar array of data points having various brightness levels, comprises a transmitter and a receiver. The transmitter comprises an analog-digital converter, for converting input analog data into digital data. The cosine transform is taken of the incoming digital data to transform the data representing various brightness levels into the frequency domain. The various frequency data points are differentially pulse code modulated, thereby removing line-to-line redundancy, the output data being in parallel form. Timing circuitry is provided for controlling the timing of the various circuits. Circuitry is provided in a receiver for the modulating or decoding of the output signal of the transmitter.

Abstract: An inductively coupled current apparatus for differential tap currents used n conjunction with charge coupled devices (CCDs) permits the current differences flowing in tapped clock lines of charge coupled devices to be conveniently measured.

Abstract: A circuit for generating a discrete Fourier transform in real time employs a digital and analog shift register, each cell of which is tapped to feed an analog switch. The outputs of the individual analog switches are fed to a summing bus where the switched analog signals combine to form the desired Fourier transform.