Patents by Inventor Robert W. Moss
Robert W. Moss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11210406Abstract: Systems and methods for encrypting system level data structures are described. A storage system may include a storage drive and at least one controller for the storage drive. In some embodiments, the at least one controller may be configured to identify user data assigned to be stored on the storage drive, encrypt the user data, identify a system data structure generated in relation to the user data, and encrypt the system data structure. In some cases, the data structure may include at least one of metadata, system data, and data encapsulation relative to the user data. In some embodiments, the user data and the data structure may be encrypted with one or more encryption keys programmed on the storage drive.Type: GrantFiled: July 15, 2016Date of Patent: December 28, 2021Assignee: SEAGATE TECHNOLOGY LLCInventors: Robert W. Moss, Stacey Secatch, Kristofer C. Conklin, Dana L. Simonson
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Patent number: 10715509Abstract: Systems and methods for encryption key shredding to protect non-persistent data are described. In one embodiment, the storage system device may include a storage drive and a controller. In some embodiments, the controller may be configured to power on the storage drive, identify an encryption key on the storage drive created upon powering on the storage drive, and encrypt data in a cache of the storage drive using the encryption key. In some embodiments, the controller may be configured to power off the storage drive and delete the encryption key upon powering off the storage drive. In some cases, the storage drive may include at least one of a solid state drive and a hard disk drive. In some embodiments, the storage drive may include a hybrid storage drive that includes both a solid state drive and a hard disk drive.Type: GrantFiled: October 30, 2018Date of Patent: July 14, 2020Assignee: SEAGATE TECHNOLOGY LLCInventors: Stacey Secatch, Kristofer C. Conklin, Dana L. Simonson, Robert W. Moss
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Patent number: 10289305Abstract: Systems and methods for enhanced read recovery based on write time information are described. In one embodiment, the systems and methods include opening a block of flash memory cells for programming, tracking a block open time, and performing a read operation of a programmed page from the block based at least in part on the block open time. In some embodiments, the block includes a plurality of pages, each page including a plurality of flash memory cells. In some cases, the block open time includes an amount of time between the block opening for programming to a time the block closes for programming.Type: GrantFiled: May 4, 2018Date of Patent: May 14, 2019Assignee: SEAGATE TECHNOLOGY LLCInventors: Dana L. Simonson, Kristofer C. Conklin, Ryan J. Goss, Robert W. Moss, Stacey Secatch
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Patent number: 10270586Abstract: Apparatus and method for defending against a side-channel information attack such as a differential power analysis (DPA) attack. In some embodiments, a cryptographic hardware pipeline circuit performs a selected cryptographic function upon a selected set of data over a processing time interval. The pipeline circuit has a sequence of stages connected in series. The stages are enabled responsive to application of an asserted enable signal. An enable interrupt circuit is configured to periodically interrupt the selected cryptographic function to provide a plurality of processing intervals interspersed with the interrupt intervals. At least a selected one of the processing intervals or the interrupt intervals have random durations selected responsive to a series of random numbers.Type: GrantFiled: April 25, 2017Date of Patent: April 23, 2019Assignee: Seagate Technology LLCInventor: Robert W. Moss
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Publication number: 20190075090Abstract: Systems and methods for encryption key shredding to protect non-persistent data are described. In one embodiment, the storage system device may include a storage drive and a controller. In some embodiments, the controller may be configured to power on the storage drive, identify an encryption key on the storage drive created upon powering on the storage drive, and encrypt data in a cache of the storage drive using the encryption key. In some embodiments, the controller may be configured to power off the storage drive and delete the encryption key upon powering off the storage drive. In some cases, the storage drive may include at least one of a solid state drive and a hard disk drive. In some embodiments, the storage drive may include a hybrid storage drive that includes both a solid state drive and a hard disk drive.Type: ApplicationFiled: October 30, 2018Publication date: March 7, 2019Applicant: SEAGATE TECHNOLOGY LLCInventors: Stacey Secatch, Kristofer C. Conklin, Dana L. Simonson, Robert W. Moss
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Patent number: 10211976Abstract: Systems and methods for hash authenticated data are described. In one embodiment, the storage device includes a storage drive and/or a controller. In some embodiments, the controller is configured to identify data to be authenticated, compute a first hash of the data using a hash function, detect a trigger event associated with the storage drive, and authenticate, after the trigger event, the data based at least in part on the first hash of the data.Type: GrantFiled: July 15, 2016Date of Patent: February 19, 2019Assignee: SEAGATE TECHNOLOGY LLCInventors: Robert W. Moss, Stacey Secatch, Dana L. Simonson, Kristofer C. Conklin
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Patent number: 10142304Abstract: Systems and methods for encryption key shredding to protect non-persistent data are described. In one embodiment, the storage system device may include a storage drive and a controller. In some embodiments, the controller may be configured to power on the storage drive, identify an encryption key on the storage drive created upon powering on the storage drive, and encrypt data in a cache of the storage drive using the encryption key. In some embodiments, the controller may be configured to power off the storage drive and delete the encryption key upon powering off the storage drive. In some cases, the storage drive may include at least one of a solid state drive and a hard disk drive. In some embodiments, the storage drive may include a hybrid storage drive that includes both a solid state drive and a hard disk drive.Type: GrantFiled: August 23, 2016Date of Patent: November 27, 2018Assignee: SEAGATE TECHNOLOGY LLCInventors: Stacey Secatch, Kristofer C. Conklin, Dana L. Simonson, Robert W. Moss
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Publication number: 20180307864Abstract: Apparatus and method for defending against a side-channel information attack such as a differential power analysis (DPA) attack. In some embodiments, a cryptographic hardware pipeline circuit performs a selected cryptographic function upon a selected set of data over a processing time interval. The pipeline circuit has a sequence of stages connected in series. The stages are enabled responsive to application of an asserted enable signal. An enable interrupt circuit is configured to periodically interrupt the selected cryptographic function to provide a plurality of processing intervals interspersed with the interrupt intervals. At least a selected one of the processing intervals or the interrupt intervals have random durations selected responsive to a series of random numbers.Type: ApplicationFiled: April 25, 2017Publication date: October 25, 2018Inventor: Robert W. Moss
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Publication number: 20180253235Abstract: Systems and methods for enhanced read recovery based on write time information are described. In one embodiment, the systems and methods include opening a block of flash memory cells for programming, tracking a block open time, and performing a read operation of a programmed page from the block based at least in part on the block open time. In some embodiments, the block includes a plurality of pages, each page including a plurality of flash memory cells. In some cases, the block open time includes an amount of time between the block opening for programming to a time the block closes for programming.Type: ApplicationFiled: May 4, 2018Publication date: September 6, 2018Applicant: SEAGATE TECHNOLOGY LLCInventors: Dana L. Simonson, Kristofer C. Conklin, Ryan J. Goss, Robert W. Moss, Stacey Secatch
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Patent number: 9977597Abstract: Systems and methods for enhanced read recovery based on write time information are described. In one embodiment, the systems and methods include opening a block of flash memory cells for programming, tracking a block open time, and performing a read operation of a programmed page from the block based at least in part on the block open time. In some embodiments, the block includes a plurality of pages, each page including a plurality of flash memory cells. In some cases, the block open time includes an amount of time between the block opening for programming to a time the block closes for programming.Type: GrantFiled: May 10, 2016Date of Patent: May 22, 2018Assignee: SEAGATE TECHNOLOGY LLCInventors: Dana L. Simonson, Kristofer C. Conklin, Ryan J. Goss, Robert W. Moss, Stacey Secatch
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Publication number: 20180088211Abstract: Aspects of the present disclosure involve a system and method for sampling received signals for performing time of flight estimation using LiDAR signal processing. In one aspect, a radio frequency analog-to-digital converter is used for real time waveform digitalization. The radio frequency analog-to-digital converter may be coupled to a mezzanine card and used to generate a clock for the converter. The digital waveform may then be buffered and correlated for time of flight estimation.Type: ApplicationFiled: September 29, 2016Publication date: March 29, 2018Inventors: NATHANIEL A. GILL, ROBERT W. MOSS, DAVID J. PETRICK
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Publication number: 20180063102Abstract: Systems and methods for encryption key shredding to protect non-persistent data are described. In one embodiment, the storage system device may include a storage drive and a controller. In some embodiments, the controller may be configured to power on the storage drive, identify an encryption key on the storage drive created upon powering on the storage drive, and encrypt data in a cache of the storage drive using the encryption key. In some embodiments, the controller may be configured to power off the storage drive and delete the encryption key upon powering off the storage drive. In some cases, the storage drive may include at least one of a solid state drive and a hard disk drive. In some embodiments, the storage drive may include a hybrid storage drive that includes both a solid state drive and a hard disk drive.Type: ApplicationFiled: August 23, 2016Publication date: March 1, 2018Applicant: SEAGATE TECHNOLOGY LLCInventors: Stacey Secatch, Kristofer C. Conklin, Dana L. Simonson, Robert W. Moss
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Publication number: 20180019876Abstract: Systems and methods for hash authenticated data are described. In one embodiment, the storage device includes a storage drive and/or a controller. In some embodiments, the controller is configured to identify data to be authenticated, compute a first hash of the data using a hash function, detect a trigger event associated with the storage drive, and authenticate, after the trigger event, the data based at least in part on the first hash of the data.Type: ApplicationFiled: July 15, 2016Publication date: January 18, 2018Applicant: SEAGATE TECHNOLOGY LLCInventors: Robert W. Moss, Stacey Secatch, Dana L. Simonson, Kristofer C. Conklin
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Publication number: 20180018469Abstract: Systems and methods for encrypting system level data structures are described. In one embodiment, a storage system may include a storage drive and at least one controller for the storage drive. In some embodiments, the at least one controller may be configured to identify user data assigned to be stored on the storage drive, encrypt the user data, identify a system data structure generated in relation to the user data, and encrypt the system data structure. In some cases, the data structure may include at least one of metadata, system data, and data encapsulation relative to the user data. In some embodiments, the user data and the data structure may be encrypted with one or more encryption keys programmed on the storage drive.Type: ApplicationFiled: July 15, 2016Publication date: January 18, 2018Applicant: SEAGATE TECHNOLOGY LLCInventors: Robert W. Moss, Stacey Secatch, Kristofer C. Conklin, Dana L. Simonson
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Publication number: 20170329525Abstract: Systems and methods for enhanced read recovery based on write time information are described. In one embodiment, the systems and methods include opening a block of flash memory cells for programming, tracking a block open time, and performing a read operation of a programmed page from the block based at least in part on the block open time. In some embodiments, the block includes a plurality of pages, each page including a plurality of flash memory cells. In some cases, the block open time includes an amount of time between the block opening for programming to a time the block closes for programming.Type: ApplicationFiled: May 10, 2016Publication date: November 16, 2017Applicant: SEAGATE TECHNOLOGY LLCInventors: Dana L. Simonson, Kristofer C. Conklin, Ryan J. Goss, Robert W. Moss, Stacey Secatch
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Patent number: 7174401Abstract: A data bus transfers data between at least one slave device and a plurality of master devices, and an arbiter grants access to each of the master devices. The slave device includes look-ahead apparatus that includes staging register for staging an identification of a master device and a decoder for comparing a staged identification to an identification of a command from the bus. The look-ahead apparatus issues split releases of a next master device while the slave device returns data associated with a prior command.Type: GrantFiled: February 28, 2002Date of Patent: February 6, 2007Assignee: LSI Logic CorporationInventors: Russell B. Stuber, Robert W. Moss
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Patent number: 7065683Abstract: An apparatus including a plurality of first base circuits, a plurality of second base circuits, a first test circuit, a second test circuit, and a test path. The plurality of first base circuits may be coupled to the plurality of second base circuits via one or more base circuit paths on a layout. The first test circuit may be disposed in a first distal location of the layout. The second test circuit may be disposed in a second distal location of the layout. The test path may be configured to (i) couple the first test circuit to the second test circuit and (ii) generate a test time delay from the first test circuit to the second test circuit incrementally longer than a maximum time delay generated by any of the base circuit paths.Type: GrantFiled: December 5, 2001Date of Patent: June 20, 2006Assignee: LSI Logic CorporationInventors: David O. Sluiter, Robert W. Moss, Mark J. Kwong, Peter Korger, Christopher M. Giles
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Patent number: 7013356Abstract: Structure and methods for preserving lock requests by master devices on multiple buses each coupled to a port of a multiported device. The invention provides for arbitration among multiple ports of a multiported device to preserve the intent of a lock request to retain exclusive control of the bus over an extended period involving multiple bus transactions directed through a corresponding port. In a first exemplary preferred embodiment, an AMBA AHB compliant bus bridge or multiported slave device is coupled through its ports to multiple AHB buses each having one or more master devices coupled thereto. Logic circuits and methods associated with port arbitration for the bus bridge device or multiported slave device preserve the intent of HLOCK requests asserted by master devices on one of the AHB buses coupled to a port to preserve the intent of the lock request through port arbitration within the multiported device.Type: GrantFiled: August 30, 2002Date of Patent: March 14, 2006Assignee: LSI Logic CorporationInventor: Robert W. Moss
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Patent number: 6999542Abstract: An apparatus including a first circuit and a second circuit. The first circuit may be configured to present a first data signal and a first indicator signal in response to a first clock signal and an enable signal. The second circuit may be configured to present a second data signal and a second indicator signal in response to the first data signal, the first indicator signal and a second clock signal.Type: GrantFiled: October 22, 2001Date of Patent: February 14, 2006Assignee: LSI Logic CorporationInventors: Peter Korger, Robert W. Moss
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Patent number: 6985985Abstract: Methods and structure for enhanced flexibility in bus arbitration without requiring modification to a standard arbiter circuit. Parameters for determining the priority of each channel involved in the arbitration are provided to a computational element to apply predicate functions thereto and thereby generate an index value. The index value is then used to access the lookup table for that channel to determine the present priority of the channel in an arbitration structure. The use of a lookup table permits simple modification to the arbitration structure for a particular application. The predicate evaluation of selected parameters further enhances flexibility in adapting the arbitration structure to the requirements of a particular application.Type: GrantFiled: June 5, 2002Date of Patent: January 10, 2006Assignee: LSI Logic CorporationInventor: Robert W. Moss