Patents by Inventor Robert W. Noonan

Robert W. Noonan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for increasing memory capacity
    Patent number: 6549420
    Abstract: A system includes a memory module formed of a first portion having a first side that directly connects to a mount in the system, which first side is of a first length; and a second portion having a second side, which second side is of a second length, the second length being greater than the first length.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: April 15, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Robert W. Noonan, Jeffery L. Hooten, Christian H. Post
  • Apparatus for maximizing memory density within existing computer system form factors
    Patent number: 6310782
    Abstract: A system includes a memory module formed of a first portion having a first side that directly connects to a mount in the system, which first side is of a first length; and a second portion having a second side, which second side is of a second length, the second length being greater than the first length. The second side may comprise an arcuate form or a plane that is different from the plane of the first side. Each of the first and second portions is used for affixing a memory element.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: October 30, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Robert W. Noonan, Jeffrey L. Hooten, Christian H. Post
  • Method and apparatus for increasing memory capacity
    Publication number: 20010010625
    Abstract: A system includes a memory module formed of a first portion having a first side that directly connects to a mount in the system, which first side is of a first length; and a second portion having a second side, which second side is of a second length, the second length being greater than the first length.
    Type: Application
    Filed: March 20, 2001
    Publication date: August 2, 2001
    Inventors: Robert W. Noonan, Jeffery L. Hooten, Christian H. Post
  • Method and apparatus for using extended-data output memory devices in a system designed for fast page mode memory devices
    Patent number: 6034919
    Abstract: A memory system including a memory controller that operates in conformity with fast page mode (FPM) memory devices and an extended-data output (EDO) memory device configured to operate with the FPM memory controller by having an output enable input receiving a column address strobe (CAS) signal from the memory controller. The EDO memory device terminates its data cycle upon negation of the CAS signal, so that it operates in a similar manner as an FPM memory device. This prevents data corruption and bus cycle contention. The memory system includes a memory board coupled through a memory board connector, which receives the CAS signal from the memory controller. The memory board includes one or more module connectors, each having an output enable contact receiving the CAS signal. The EDO memory device is mounted on a memory module and includes an output enable input pin which receives the CAS signal when the memory module is plugged into the memory board.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: March 7, 2000
    Assignee: Compaq Computer Corporation
    Inventor: Robert W. Noonan, II