Patents by Inventor Robert W. Yanka

Robert W. Yanka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5517029
    Abstract: A dual band IR scanning focal plane assembly includes two linear detector arrays in a close spaced configuration monolithically integrated on a common substrate. A medium wave IR staggered element linear array is formed on the front (111)B face of a (111) crystallographically oriented CdZnTe substrate in an MCT layer deposited by the molecular beam epitaxial (MBE) process. A long wave IR staggered element linear array is formed on the back (111)A face of the substrate in an MCT layer deposited by the liquid phase epitaxial (LPE) process. The sets of odd and even rows of the LWIR array on the back face are contiguous, while the sets of odd and even rows of the MWIR array on the front face are close-spaced, the spacing being just wide enough to allow a clear optical path to the underlying linear LWIR array. The arrangement provides simplified spectral separation of the simultaneously readout MWIR and LWIR images.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: May 14, 1996
    Assignee: Martin Marietta Corporation
    Inventors: Robert W. Yanka, Milton L. Noble
  • Patent number: 5512750
    Abstract: A compact dual band IR focal plane assembly provides simultaneous, coincident two-dimensional image readout. It includes a MIS-CID MWIR detector array formed in an epitaxial layer grown by the MBE process on the (111B) front face of an IR transparent crystalline first substrate, the pixels thereof forming LWIR transparent windows, with opaque connections thereto lying in aisles framing the windows, and a PV diode LWIR detector array formed in an epitaxial layer grown by the LPE process on the (111A) back face of the substrate, the LWIR pixels being aligned with the transparent MWIR pixels. An MWIR MUX is provided on an IR transparent silicon second substrate arranged in front of the first substrate. The opaque switch portion of the MWIR MUX is arrayed with apertures and aisles in alignment with the windows and aisles of the MIS-CID array.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: April 30, 1996
    Assignee: Martin Marietta Corporation
    Inventors: Robert W. Yanka, Milton L. Noble
  • Patent number: 5510644
    Abstract: An improved x-ray detector in the form of a p-i-n CdTe homojunction device is disclosed. The intrinsic ("i") layer is of high resistivity CdTe, while the n- and p-doped CdTe layers are epitaxially grown in a photo-assisted process in a molecular beam epitaxial apparatus. The n-dopant is conveniently indium, with an indium metal contact. The "i" layer is optionally epitaxially grown in a photo-assisted process. The p-dopant is preferably arsenic. A PAMBE formed mercury telluride contact layer enhances the ohmic contact to the p-layer, and a gold contact is provided to the contact layer. The use of the PAMBE technique facilitates high quality crystal growth and activation of the dopants. The resulting CdTe p-i-n homojunction device has a wide band gap (1.45 eV) essential to room temperature operation.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: April 23, 1996
    Assignee: Martin Marietta Corporation
    Inventors: Karl A. Harris, Thomas H. Myers, II, Robert W. Yanka
  • Patent number: 5454885
    Abstract: A typical source of cadmium and tellurium is as a by-product of copper mining. Although attempts are made to remove impurities such as copper prior to commercially supplying them for forming material like cadmium telluride, cadmium zinc telluride and cadmium telluride selenide for use as a substrate to support electronic circuitry, processing during formation of the circuitry causes the impurities from the substrate to segregate into the circuitry, resulting in unacceptable electrical performance of the circuitry. A method for purifying the substrate prior to circuitry formation includes forming a sacrificial layer of mercury telluride or mercury cadmium telluride on the substrate, annealing the combination at elevated temperature with an overpressure of mercury and removing the sacrificial layer along with a contiguous portion of the substrate, if desired. The sacrificial layer may be formed by vapor phase type processes or even by liquid phase epitaxy.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: October 3, 1995
    Assignee: Martin Marietta Corporation
    Inventors: Gregory K. Dudoff, Karl A. Harris, Lee M. Mohnkern, Richard J. Williams, Robert W. Yanka, Thomas H. Meyers, III