Abstract: A memory is disclosed. The memory may include a first data structure. The first data structure may include a first field to store a first data relating to a command. The memory may also include a second data structure. The second data structure may include a second field to store a second data relating to the command. A first queue stored in the memory may include the first data structure. A second queue stored in the memory may include the second data structure.

Abstract: A memory is disclosed. The memory may include a first data structure. The first data structure may include a first field to store a first data relating to a command. The memory may also include a second data structure. The second data structure may include a second field to store a second data relating to the command. A first queue stored in the memory may include the first data structure. A second queue stored in the memory may include the second data structure.

Abstract: A memory is disclosed. The memory may include a first data structure and a second data structure. The first data structure may include a first field to store a first data relating to a command, and a related command field, the related command field to store a value. The second data structure may include a second field to store a second data relating to the command. A queue stored in the memory, may include the first data structure. A storage device may be configured to identify the first data structure and the second data structure (405, 705) as related based at least in part on the value.

Abstract: A memory is disclosed. The memory may include a first data structure. The first data structure may include a first field to store a first data relating to a command. The memory may also include a second data structure. The second data structure may include a second field to store a second data relating to the command. A first queue stored in the memory may include the first data structure. A second queue stored in the memory may include the second data structure.

Abstract: A method may include receiving, at a device, a copy command, wherein the copy command comprises a first indication of a first amount of source data and a second indication of a second amount of source data, determining, based at least in part on the first indication, an amount of destination space, and blocking at least a portion of the amount of destination space. The method may further include reading the first indication, and reading the second indication, wherein the amount of destination space may include at least a first portion of the first amount and at least a second portion of the second amount. The blocking may include blocking the at least the first portion of the first amount and the at least the second portion of the second amount. The method may further include storing the first indication to generate a stored first indication.

Abstract: A memory is disclosed. The memory may include a first data structure and a second data structure. The first data structure may include a first field to store a first data relating to a command, and a related command field, the related command field to store a value. The second data structure may include a second field to store a second data relating to the command. A queue stored in the memory, may include the first data structure. A storage device may be configured to identify the first data structure and the second data structure (405, 705) as related based at least in part on the value.

Abstract: A memory is disclosed. The memory may include a first data structure and a second data structure. The first data structure may include a first field to store a first data relating to a command, and a related command field, the related command field to store a value. The second data structure may include a second field to store a second data relating to the command. A queue stored in the memory, may include the first data structure. A storage device may be configured to identify the first data structure and the second data structure (405, 705) as related based at least in part on the value.

Abstract: A method may include receiving, at a device, a copy command, wherein the copy command comprises a first indication of a first amount of source data and a second indication of a second amount of source data, determining, based at least in part on the first indication, an amount of destination space, and blocking at least a portion of the amount of destination space. The method may further include reading the first indication, and reading the second indication, wherein the amount of destination space may include at least a first portion of the first amount and at least a second portion of the second amount. The blocking may include blocking the at least the first portion of the first amount and the at least the second portion of the second amount. The method may further include storing the first indication to generate a stored first indication.

Abstract: In some aspects, the techniques described herein relate to a method including receiving, from a host device, a first request to write first data to a memory device; adding the first request to a queue on the memory device; determining an availability of a write buffer of the memory device; retrieving the first data from the host device based on the determining and the first request added to the queue; and writing the first data to a write buffer of the memory device. The method may further include returning a completion message to the host device based on writing the first data to the write buffer; and writing the first data from the write buffer of the memory device to storage media. The first request may be an SQE, and the method may further include parsing the SQE and determining that the SQE is a write command.

Abstract: A memory is disclosed. The memory may include a first data structure and a second data structure. The first data structure may include a first field to store a first data relating to a command, and a related command field, the related command field to store a value. The second data structure may include a second field to store a second data relating to the command. A queue stored in the memory, may include the first data structure. A storage device may be configured to identify the first data structure and the second data structure (405, 705) as related based at least in part on the value.

Abstract: A memory is disclosed. The memory may include a first data structure. The first data structure may include a first field to store a first data relating to a command. The memory may also include a second data structure. The second data structure may include a second field to store a second data relating to the command. A first queue stored in the memory may include the first data structure. A second queue stored in the memory may include the second data structure.

Abstract: A data storage system can organize a semiconductor memory into a first data set and a second data set with a first queue populated with a first data access request from a host. An assignment of an arbitration weight to the first queue with an arbitration circuit corresponds with the first queue being skipped during a deterministic window based on the arbitration weight.

Abstract: Method and apparatus for protecting against a jitter attack upon a cryptographic processing device. In some embodiments, the cryptographic processing circuit is configured to perform a cryptographic function on a set of input data to generate a corresponding set of transformed output data. An input line supplies an input signal used by the cryptographic processing IC during execution of the cryptographic function. A monitor circuit monitors the input signal, and temporarily disables the cryptographic processing IC when time-varying changes to the input signal indicate a jitter attack may be taking place. The input signal may be a source voltage, and voltage transitions in the source voltage can be monitored. Alternatively, the input signal may be a clock signal, and frequency variations in the clock signal can be monitored. The monitor circuit may be arranged on a power island to maintain power during power fluctuations.

Abstract: Method and apparatus for managing data transfers. In some embodiments, first and second storage devices respectively include first and second controllers, first and second local memories, and first and second non-volatile memories (NVMs). A virtual controller memory buffer (CMB) is formed from a dedicated portion of each of the first and second local memories for control by a host device. The first controller receives a virtual command set from the host device, and extracts a first local command to transfer data between the host device and the first NVM. In some cases, the second controller also receives the virtual command set and concurrently extracts a different, second local command to transfer data between the host device and the second NVM. Alternatively, the first controller may extract and forward the second local command to the second controller. The first and second NVMs may form an NVMe (Non-Volatile Memory Express) namespace.

Abstract: Method and apparatus for deterministically arbitrating a shared resource in a system, such as a solid-state drive (SSD) operated in accordance with the NVMe (Non-Volatile Memory Express) specification. An NVM, such as a flash memory, is coupled to a controller circuit for concurrent servicing of data transfer commands from multiple users along parallel data paths that include a shared resource. A time cycle during which the shared resource can be used is divided into a sequence of time-slices, each assigned to a different user. The shared resource is thereafter repetitively allocated over a succession of time cycles to each of the users in turn during the associated time-slices. If a selected time-slice goes unused by the associated user, the shared resource remains unused rather than being used by a different user, even if a pending request for the shared resource has been issued.

Abstract: Method and apparatus for managing data transfers. In some embodiments, first and second storage devices respectively include first and second controllers, first and second local memories, and first and second non-volatile memories (NVMs). A virtual controller memory buffer (CMB) is formed from a dedicated portion of each of the first and second local memories for control by a host device. The first controller receives a virtual command set from the host device, and extracts a first local command to transfer data between the host device and the first NVM. In some cases, the second controller also receives the virtual command set and concurrently extracts a different, second local command to transfer data between the host device and the second NVM. Alternatively, the first controller may extract and forward the second local command to the second controller. The first and second NVMs may form an NVMe (Non-Volatile Memory Express) namespace.

Abstract: Method and apparatus for managing data in a data storage device configured as a storage compute appliance. In some embodiments, the data storage device has a non-volatile memory (NVM) and a controller circuit. The NVM stores a plurality of data sets encrypted by at least one encryption key. The controller circuit performs a storage compute appliance process by locally decrypting the plurality of data sets in a local memory of the data storage device, generating summary results data from the decrypted data sets, and transferring the summary results data across the host interface to an authorized user without a corresponding transfer of any portion of the decrypted data sets across the host interface.

Abstract: Method and apparatus for managing data in a data storage device configured as a storage compute appliance. In some embodiments, the data storage device has a controller circuit and a non-volatile memory (NVM) with an overall data storage capacity. A processor authenticates each of a plurality of authorized users of the NVM via data exchanges between a host device and the processor without reference to an external authentication authority device. Upon authentication, each authorized user is allocated a separate portion of the overall data storage capacity of the NVM using an allocation model. The size of at least one of the separate portions is subsequently adjusted based on an access history of the NVM. The storage device may be a key-value storage device so that a separate set of key values is provided to each authorized user to identify data blocks stored to and retrieved from the NVM.

Abstract: A data storage system can organize a semiconductor memory into a first data set and a second data set with a first queue populated with a first data access request from a host. An assignment of an arbitration weight to the first queue with an arbitration circuit corresponds with the first queue being skipped during a deterministic window based on the arbitration weight.

Abstract: Systems and methods are disclosed for enhanced garbage collection operations at a memory device. The enhanced garbage collection may include selecting data and blocks to garbage collect to improve device performance. Data may be copied and reorganized according to a data stream via which the data was received, or data and blocks may be evaluated for garbage collection based on other access efficiency metrics. Data may be selected for collection based on sequentiality of the data, host access patterns, or other factors. Processing of host commands may be throttled based on a determined amount of work to garbage collect a plurality of blocks, in order to limit variability in host command throughput over a time period.