Patents by Inventor Robert William Chapman

Robert William Chapman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240070316
    Abstract: Techniques for a privacy-based user data sharing protocol disclose a system that receives a request to consent to share user data with a subscriber device. The system identifies, based on the request, a smart contract associated with the subscriber device. The smart contract comprises one or more conditions for collecting and managing the user data. The system generates a token based on the smart contract, in which the token indicates consent by a user to share the user data with the subscriber device according to the one or more conditions. The system records the generated token to a blockchain.
    Type: Application
    Filed: August 31, 2023
    Publication date: February 29, 2024
    Inventors: Charles William SIBBACH, Jonathan Michael PADILLA, Lucas Duffield NOVAK, Robert Alexander MCCOMB, Scott DAVIS, Todd Allen CHAPMAN, Varun PARTHASARATHY
  • Patent number: 8990437
    Abstract: A software or hardware agent running on a personal computing (PC) device provides allows a consumer electronic device connected to the PC device over a high definition multimedia interface (HDMI) network to control the PC device using standardized commands. This enables a user to control the PC device and other consumer electronic devices that are connected to the HDMI network using a single interface. The agent responds as a consumer electronic device and translates the standardized commands as universal serial bus (USB) human interface device (HID) input reports to the PC device operating system. The agent represents the specific capabilities of the PC device as standard consumer electronic device controls.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: March 24, 2015
    Assignee: Nvidia Corporation
    Inventors: Mark A. Overby, Robert William Chapman
  • Patent number: 8294821
    Abstract: A software or hardware agent running on a personal computing device provides allows application programs to interact with consumer electronic devices using standardized controls. The consumer electronic devices appear to be directly connected to the personal computing device rather than being connected over a high definition multimedia interface (HDMI) network. This enables a user to control the consumer electronic devices using a single interface rather than a separate interface for each consumer electronic device. The agent enumerates a universal serial bus (USB) human interface device (HID) for each consumer electronic device reported on the HDMI network. The USB HIDs represent the specific capabilities of the each one of the consumer electronic devices.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: October 23, 2012
    Assignee: NVIDIA Corporation
    Inventors: Mark A. Overby, Robert William Chapman
  • Patent number: 8069355
    Abstract: A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: November 29, 2011
    Assignee: NVIDIA Corporation
    Inventors: Brad W. Simeral, David G. Reed, Dmitry Vyshetsky, Roman Surgutchik, Robert William Chapman, Joshua Titus, Anand Srinivasan, Hari U. Krishnan
  • Patent number: 7849342
    Abstract: A method and system for implementing a generalized system stutter are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of blocking a first request received from a first of a plurality of bus masters during a low power state of a computing device for as long as permissible by the timing requirements of the computing device, wherein the first request is capable of triggering the computing device to transition out of the low power state, and during an active state of the computing device, servicing the first request along with other pending requests from the rest of the plurality of bus masters before the computing device transitions back to the low power state.
    Type: Grant
    Filed: May 1, 2007
    Date of Patent: December 7, 2010
    Assignee: NVIDIA Corporation
    Inventors: Roman Surgutchik, Robert William Chapman, David G. Reed, Brad W. Simeral
  • Patent number: 7779191
    Abstract: A system and method for transitions a computing system between operating modes that have different power consumption characteristics. When a system management unit (SMU) determines that the computing system is in a low activity state, the SMU transitions the central processing unit (CPU) into a low power operating mode after the CPU stores critical operating state of the CPU in a memory. The SMU then intercepts and processes interrupts intended for the CPU, modifying a copy of the critical operating state. This effectively extends the time during which the CPU stays in lower power mode. When the SMU determines that the computing system exits a low activity state, the copy of the critical operating state is stored in the memory and the SMU transitions the CPU into a high power operating mode using the modified critical operating state.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: August 17, 2010
    Assignee: NVIDIA Corporation
    Inventors: Chien-Ping Lu, Stephen D. Lew, Robert William Chapman
  • Patent number: 7716506
    Abstract: A system has a plurality of different clients. Each client generates a report signal indicative of a current latency tolerance associated with a performance state. A controller dynamically determines a power down level having a minimum power consumption capable of supporting the system latency of the configuration state of the clients.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: May 11, 2010
    Assignee: Nvidia Corporation
    Inventors: Roman Surgutchik, Robert William Chapman, Edward L. Riegelsberger, Brad W. Simeral, Paul J. Gyugyi
  • Publication number: 20100031071
    Abstract: A system and method for transitions a computing system between operating modes that have different power consumption characteristics. When a system management unit (SMU) determines that the computing system is in a low activity state, the SMU transitions the central processing unit (CPU) into a low power operating mode after the CPU stores critical operating state of the CPU in a memory. The SMU then intercepts and processes interrupts intended for the CPU, modifying a copy of the critical operating state. This effectively extends the time during which the CPU stays in lower power mode. When the SMU determines that the computing system exits a low activity state, the copy of the critical operating state is stored in the memory and the SMU transitions the CPU into a high power operating mode using the modified critical operating state.
    Type: Application
    Filed: July 29, 2008
    Publication date: February 4, 2010
    Inventors: Chien-Ping LU, Stephen D. Lew, Robert William Chapman
  • Publication number: 20090150689
    Abstract: A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 11, 2009
    Inventors: Brad W. Simeral, David C. Reed, Dmitry Vyshetsky, Roman Surgutchick, Robert William Chapman, Joshua Titus, Anand Srinivasan, Hari U. Krishnan
  • Publication number: 20090125642
    Abstract: A software or hardware agent running on a personal computing (PC) device provides allows a consumer electronic device connected to the PC device over a high definition multimedia interface (HDMI) network to control the PC device using standardized commands. This enables a user to control the PC device and other consumer electronic devices that are connected to the HDMI network using a single interface. The agent responds as a consumer electronic device and translates the standardized commands as universal serial bus (USB) human interface device (HID) input reports to the PC device operating system. The agent represents the specific capabilities of the PC device as standard consumer electronic device controls.
    Type: Application
    Filed: November 13, 2007
    Publication date: May 14, 2009
    Inventors: Mark A. Overby, Robert William Chapman
  • Patent number: 7487371
    Abstract: A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: February 3, 2009
    Assignee: Nvidia Corporation
    Inventors: Brad W. Simeral, David G. Reed, Dmitry Vyshetsky, Roman Surgutchick, Robert William Chapman, Joshua Titus, Anand Srinivasan, Hari U. Krishnan
  • Publication number: 20080276108
    Abstract: A method and system for implementing a generalized system stutter are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of blocking a first request received from a first of a plurality of bus masters during a low power state of a computing device for as long as permissible by the timing requirements of the computing device, wherein the first request is capable of triggering the computing device to transition out of the low power state, and during an active state of the computing device, servicing the first request along with other pending requests from the rest of the plurality of bus masters before the computing device transitions back to the low power state.
    Type: Application
    Filed: May 1, 2007
    Publication date: November 6, 2008
    Inventors: Roman Surgutchik, Robert William Chapman, David G. Reed, Brad W. Simeral
  • Patent number: 7302512
    Abstract: A computer device, an input/output (“I/O”) communication subsystem, a chipset and a method are disclosed for implementing interrupt message packets to facilitate peer-to-peer communications between a device controller and a coprocessor. Advantageously, the various embodiments of the invention obviate a requirement for specialized circuitry on a motherboard to establish peer-to-peer communications. In one embodiment, an I/O communication subsystem includes a bus interface for coupling the I/O communication subsystem to a general-purpose bus. It also includes a device controller being configured to generate an interrupt as an interrupt message packet for a coprocessor, which, in turn, interrupts processing functions that otherwise are performed by the host processor. The device controller can reside either internal or external to the I/O communication subsystem.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: November 27, 2007
    Assignee: Nvidia Corporation
    Inventors: Andrew Currid, Robert William Chapman