Patents by Inventor Robert Winter
Robert Winter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12117790Abstract: A method synchronizes first and second simulation systems, each operating in a free running operation thereby exchanging data to run the simulation systems. The method includes: a) providing the first simulation system (PLCSIM) being enabled to run in cycles at a linear speed determined by repeatably setting a scaling factor (sn); b) providing the second simulation system (Process Simulate) to run in cycles at different speeds; c) the second simulation system requests at the end of a cycle a virtual time stamp from the first simulation system; d) calculating on the basis of the virtual time stamp a virtual duration time Atnfs and on the basis of the virtual time stamp after completion of the cycle of the second simulation system a virtual duration time Atnss; and e) calculating an update sn+1 for the scaling factor according the most recent scaling factor sn multiplied by Atnss/Atnfs.Type: GrantFiled: October 29, 2018Date of Patent: October 15, 2024Assignee: Siemens Industry Software Ltd.Inventors: Guy Barak, Moshe Hazan, Werner Herla, Gilad Milman, Johannes Ottermann, Gal Snir, Robert Winter
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Publication number: 20220004159Abstract: A method synchronizes first and second simulation systems, each operating in a free running operation thereby exchanging data to run the simulation systems. The method includes: a) providing the first simulation system (PLCSIM) being enabled to run in cycles at a linear speed determined by repeatably setting a scaling factor (sn); b) providing the second simulation system (Process Simulate) to run in cycles at different speeds; c) the second simulation system requests at the end of a cycle a virtual time stamp from the first simulation system; d) calculating on the basis of the virtual time stamp a virtual duration time Atnfs and on the basis of the virtual time stamp after completion of the cycle of the second simulation system a virtual duration time Atnss; and e) calculating an update sn+1 for the scaling factor according the most recent scaling factor sn multiplied by Atnss/Atnfs.Type: ApplicationFiled: October 29, 2018Publication date: January 6, 2022Inventors: Guy Barak, Moshe Hazan, Werner Herla, Gilad Milman, Johannes Ottermann, Gal Snir, Robert Winter
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Publication number: 20190080711Abstract: A tolerance ring can be disposed between an inner component and an outer component, the inner and outer components defining stepped sidewalls. In an embodiment, a preassembly can include an outer component defining a bore having a stepped inner sidewall, an inner component having a stepped outer sidewall, and a tolerance ring adapted to be disposed between the inner component and the bore. In an embodiment, an assembly can include an outer component defining a bore having a stepped inner sidewall, an inner component having a stepped outer sidewall, and a tolerance ring disposed between the inner component and the bore. In an embodiment, a hard disk drive preassembly can include an actuator arm defining a bore having a stepped inner sidewall, a pivot having a stepped outer sidewall, and a tolerance ring adapted to be disposed between the pivot and the bore.Type: ApplicationFiled: November 8, 2018Publication date: March 14, 2019Inventors: Benjamin NIAS, Andrew R. SLAYNE, Simon A. HUGHES, Robert WINTER
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Patent number: 10157635Abstract: A tolerance ring can be disposed between an inner component and an outer component, the inner and outer components defining stepped sidewalls. In an embodiment, a preassembly can include an outer component defining a bore having a stepped inner sidewall, an inner component having a stepped outer sidewall, and a tolerance ring adapted to be disposed between the inner component and the bore. In an embodiment, an assembly can include an outer component defining a bore having a stepped inner sidewall, an inner component having a stepped outer sidewall, and a tolerance ring disposed between the inner component and the bore. In an embodiment, a hard disk drive preassembly can include an actuator arm defining a bore having a stepped inner sidewall, a pivot having a stepped outer sidewall, and a tolerance ring adapted to be disposed between the pivot and the bore.Type: GrantFiled: July 10, 2015Date of Patent: December 18, 2018Assignee: SAINT-GOBAIN PERFORMANCE PLASTICS RENCOL LIMITEDInventors: Benjamin Nias, Andrew R. Slayne, Simon A. Hughes, Robert Winter
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Patent number: 9781069Abstract: A gratuitous address resolution protocol frame is sent from an information handling system upon detection of VLAN status change the information handling system. A status flag included in the address resolution protocol frame provides a switch that receives the frame with the status change, such as the addition or removal of a VLAN at the information handling system.Type: GrantFiled: April 2, 2015Date of Patent: October 3, 2017Assignee: DELL PRODUCTS L.P.Inventors: Hendrich Hernandez, Gaurav Chawla, Robert Winter
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Patent number: 9473312Abstract: Systems and methods for “Wake on Application” (WOA). An Information Handling System (IHS) may include a logic circuit and a memory having instructions that, upon execution, cause the IHS to: receive a WOA packet while the IHS is in a first power state, where the WOA packet identifies at least one of a software application or virtual server residing within the IHS; and, in response to having received the WOA packet, operate in a second power state and launch the software application or wake up the virtual server. A method may include originating, via a first IHS, a single WOA packet; and transmitting the single WOA packet over a network, where the single WOA packet is configured to cause a second IHS to switch operation from a first power state to a second power state, and to launch a software application or wake up a virtual server.Type: GrantFiled: September 6, 2013Date of Patent: October 18, 2016Assignee: DELL PRODUCTS, L.P.Inventors: Robert Winter, Robert Hormuth
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Patent number: 9361212Abstract: A programmable logic controller (PLC) with changing memory access times is intended to interact with a subordinate system, i.e., a discontinuous virtualized system, wherein a computation apparatus is provided, in which the PLC is implemented and in which the system that is subordinate to the PLC with respect to an operation to access the memory access is implemented. A memory to which a component of the PLC has access is integrated in the PLC. Also implemented in the computation apparatus is a proxy device that coordinates access to the memory of the PLC by the subordinate system such that simultaneous access by the component of the PLC has priority over access by the subordinate system and it is thus possible to ensure that the PLC always complies with a predefined cycle time of the PLC.Type: GrantFiled: June 10, 2010Date of Patent: June 7, 2016Assignee: Siemens AktiengesellschaftInventors: Michael Engel, Frederik Heuser, Michael Schlereth, Robert Winter
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Publication number: 20160012836Abstract: A tolerance ring can be disposed between an inner component and an outer component, the inner and outer components defining stepped sidewalls. In an embodiment, a preassembly can include an outer component defining a bore having a stepped inner sidewall, an inner component having a stepped outer sidewall, and a tolerance ring adapted to be disposed between the inner component and the bore. In an embodiment, an assembly can include an outer component defining a bore having a stepped inner sidewall, an inner component having a stepped outer sidewall, and a tolerance ring disposed between the inner component and the bore. In an embodiment, a hard disk drive preassembly can include an actuator arm defining a bore having a stepped inner sidewall, a pivot having a stepped outer sidewall, and a tolerance ring adapted to be disposed between the pivot and the bore.Type: ApplicationFiled: July 10, 2015Publication date: January 14, 2016Inventors: Benjamin Nias, Andrew R. Slayne, Simon A. Hughes, Robert Winter
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Patent number: 9203762Abstract: Information handling system network traffic is managed by populating a DCBX client framework with application network parameters associated with predetermined applications. Network devices, such as information handling system clients and servers, retrieve a TLV from a switch to obtain application network parameters for an application and apply the parameters so that the application executing on the device tags network communications with the associated parameters, such as bandwidth, loss less behavior, priority, latency, through put and CPU utilization.Type: GrantFiled: June 26, 2014Date of Patent: December 1, 2015Assignee: DELL PRODUCTS L.P.Inventors: Gaurav Chawla, Hendrich M. Hernandez, Jacob Cherian, Robert Winter, Saikrishna Kotha
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Publication number: 20150215266Abstract: A gratuitous address resolution protocol frame is sent from an information handling system upon detection of VLAN status change the information handling system. A status flag included in the address resolution protocol frame provides a switch that receives the frame with the status change, such as the addition or removal of a VLAN at the information handling system.Type: ApplicationFiled: April 2, 2015Publication date: July 30, 2015Applicant: DELL PRODUCTS L.P.Inventors: Hendrich Hernandez, Gaurav Chawla, Robert Winter
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Patent number: 9019967Abstract: A gratuitous address resolution protocol frame is sent from an information handling system upon detection of VLAN status change the information handling system. A status flag included in the address resolution protocol frame provides a switch that receives the frame with the status change, such as the addition or removal of a VLAN at the information handling system.Type: GrantFiled: July 30, 2012Date of Patent: April 28, 2015Assignee: Dell Products L.P.Inventors: Hendrich Hernandez, Gaurav Chawla, Robert Winter
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Publication number: 20150074432Abstract: Systems and methods for “Wake on Application” (WOA). An Information Handling System (IHS) may include a logic circuit and a memory having instructions that, upon execution, cause the IHS to: receive a WOA packet while the IHS is in a first power state, where the WOA packet identifies at least one of a software application or virtual server residing within the IHS; and, in response to having received the WOA packet, operate in a second power state and launch the software application or wake up the virtual server. A method may include originating, via a first IHS, a single WOA packet; and transmitting the single WOA packet over a network, where the single WOA packet is configured to cause a second IHS to switch operation from a first power state to a second power state, and to launch a software application or wake up a virtual server.Type: ApplicationFiled: September 6, 2013Publication date: March 12, 2015Applicant: Dell Products, L.P.Inventors: Robert Winter, Robert Hormuth
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Publication number: 20140307548Abstract: Information handling system network traffic is managed by populating a DCBX client framework with application network parameters associated with predetermined applications. Network devices, such as information handling system clients and servers, retrieve a TLV from a switch to obtain application network parameters for an application and apply the parameters so that the application executing on the device tags network communications with the associated parameters, such as bandwidth, loss less behavior, priority, latency, through put and CPU utilization.Type: ApplicationFiled: June 26, 2014Publication date: October 16, 2014Applicant: DELL PRODUCTS L.P.Inventors: Gaurav Chawla, Hendrich M. Hernandez, Jacob Cherian, Robert Winter, Saikrishna Kotha
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Patent number: 8780923Abstract: Information handling system network traffic is managed by populating a DCBX client framework with application network parameters associated with predetermined applications. Network devices, such as information handling system clients and servers, retrieve a TLV from a switch to obtain application network parameters for an application and apply the parameters so that the application executing on the device tags network communications with the associated parameters, such as bandwidth, loss less behavior, priority, latency, through put and CPU utilization.Type: GrantFiled: January 15, 2010Date of Patent: July 15, 2014Assignee: Dell Products L.P.Inventors: Gaurav Chawla, Hendrich M. Hernandez, Jacob Cherian, Robert Winter, Saikrishna Kotha
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Publication number: 20140029623Abstract: A gratuitous address resolution protocol frame is sent from an information handling system upon detection of VLAN status change the information handling system. A status flag included in the address resolution protocol frame provides a switch that receives the frame with the status change, such as the addition or removal of a VLAN at the information handling system.Type: ApplicationFiled: July 30, 2012Publication date: January 30, 2014Inventors: Hendrich Hernandez, Gaurav Chawla, Robert Winter
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Publication number: 20130205103Abstract: A programmable logic controller (PLC) with changing memory access times is intended to interact with a subordinate system, i.e., a discontinuous virtualized system, wherein a computation apparatus is provided, in which the PLC is implemented and in which the system that is subordinate to the PLC with respect to an operation to access the memory access is implemented. A memory to which a component of the PLC has access is integrated in the PLC. Also implemented in the computation apparatus is a proxy device that coordinates access to the memory of the PLC by the subordinate system such that simultaneous access by the component of the PLC has priority over access by the subordinate system and it is thus possible to ensure that the PLC always complies with a predefined cycle time of the PLC.Type: ApplicationFiled: June 10, 2010Publication date: August 8, 2013Applicant: Siemens AktiengesellschaftInventors: Michael Engel, Michael Schlereth, Frederik Heuser, Robert Winter
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Patent number: 8358656Abstract: DisplayPort micropackets of uncompressed visual information are adapted to conventional network infrastructure with a switch having DisplayPort ports, network ports and a packet converter. The packet converter encapsulates DisplayPort packets for communication through network ports and extracts DisplayPort packets from network packets for communication through DisplayPort ports. An address resolution table associates the switch ports with each other and with a packet converter operation by using a control field that defines the packet converter operation for information received at each port, such as encapsulation, extraction or native switching.Type: GrantFiled: January 6, 2011Date of Patent: January 22, 2013Assignee: Dell Products L.P.Inventors: Robert Winter, Bruce Montag, Liam B. Quinn
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Publication number: 20110176551Abstract: Information handling system network traffic is managed by populating a DCBX client framework with application network parameters associated with predetermined applications. Network devices, such as information handling system clients and servers, retrieve a TLV from a switch to obtain application network parameters for an application and apply the parameters so that the application executing on the device tags network communications with the associated parameters, such as bandwidth, loss less behavior, priority, latency, through put and CPU utilization.Type: ApplicationFiled: January 15, 2010Publication date: July 21, 2011Inventors: Gaurav Chawla, Hendrich M. Hernandez, Jacob Cherian, Robert Winter, Saikrishna Kotha
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Publication number: 20110103386Abstract: DisplayPort micropackets of uncompressed visual information are adapted to conventional network infrastructure with a switch having DisplayPort ports, network ports and a packet converter. The packet converter encapsulates DisplayPort packets for communication through network ports and extracts DisplayPort packets from network packets for communication through DisplayPort ports. An address resolution table associates the switch ports with each other and with a packet converter operation by using a control field that defines the packet converter operation for information received at each port, such as encapsulation, extraction or native switching.Type: ApplicationFiled: January 6, 2011Publication date: May 5, 2011Inventors: Robert Winter, Bruce Montag, Liam B. Quinn
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Patent number: 7929525Abstract: DisplayPort micropackets of uncompressed visual information are adapted for communication across a network by stuffing packets with sink device identification information. For example, a packet stuffer adds selected portions of sink device EDID information to DisplayPort packets, such as EDID bytes 8 through 15, to a predetermined portion of the DisplayPort packets, such as between symbols FS and FE. Adding sink device identification information to each DisplayPort packet supports routing or switching of the packets to the identified sink device.Type: GrantFiled: June 28, 2007Date of Patent: April 19, 2011Assignee: Dell Products L.P.Inventors: Robert Winter, Bruce Montag, Liam B. Quinn