Patents by Inventor Robert Wisniewski

Robert Wisniewski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12475031
    Abstract: A method to address memory in nodes of a distributed memory system includes partitioning the memory in each node into one or more memory blocks available for a global memory pool. The method also includes combining, in response to a request to address memory in the global memory pool, a global bit from a global page table with a physical address to generate a global virtual address. The global bit indicates whether the memory is local or remote. The method also includes translating, using global access tuple (GAT) tables, the global virtual address to a global physical address, and addressing a memory block in the global memory pool based on the global physical address.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: November 18, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: David Lombard, Robert Wisniewski, Douglas Joseph, Matthew Wolf, Jai Dayal, James Loo, Andrew Thomas Tauferner, Rolf Riesen
  • Publication number: 20250139010
    Abstract: Systems and methods for computing with multiple nodes. In some embodiments, a method includes: executing, by a first node of a plurality of nodes, a global load from a first address of a shared memory, the shared memory being shared by the nodes, the first address being an address within a shared memory section of a second node, the first address being cached in a first cache of the first node, the executing including: fetching a value stored in the shared memory, at the first address.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 1, 2025
    Inventors: Alan GARA, Douglas JOSEPH, Arun RODRIGUES, Samantika SURY, Rolf RIESEN, Robert WISNIEWSKI
  • Publication number: 20250139007
    Abstract: Systems and methods for computing with multiple nodes. In some embodiments, a method includes writing, during each of a sequence of time steps, by each node of a plurality of nodes, to a shared memory, the shared memory being shared by the nodes, wherein: each of the nodes includes a hardware-maintained coherence domain and is connected to the other nodes, and each of the nodes includes a respective portion of the shared memory.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 1, 2025
    Inventors: Alan GARA, Douglas JOSEPH, Arun RODRIGUES, Samantika SURY, Rolf RIESEN, Robert WISNIEWSKI
  • Publication number: 20250139012
    Abstract: Systems and methods for computing with multiple nodes. In some embodiments, a method includes: executing, by a first node of a plurality of nodes, a global clean, the executing including: determining that a first cached value in a cache of the first node is a modified cached copy of data in a shared memory, the shared memory being shared by the nodes; and in response to determining that the first cached value is a modified cached copy of data in the shared memory, writing back the first cached value to the shared memory.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 1, 2025
    Inventors: Alan GARA, Douglas JOSEPH, Arun RODRIGUES, Samantika SURY, Rolf RIESEN, Robert WISNIEWSKI
  • Patent number: 12248808
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to relocate a compute thread, the apparatus comprising control circuitry to maintain a location of a plurality of domain access counters associated with a plurality of compute-memory domains for a first compute thread, and an execution monitor to set a first domain access counter of the plurality of domain access counters, the first domain access counter associated with a first compute-memory domain of the compute-memory domains, and relocate the first compute thread to a second compute-memory domain of the compute-memory domains in response to a comparison between a second domain access counter associated with the second compute-memory domain and the first domain access counter.
    Type: Grant
    Filed: June 26, 2021
    Date of Patent: March 11, 2025
    Assignee: INTEL CORPORATION
    Inventors: Rolf Riesen, Robert Wisniewski, Rajesh Poornachandran
  • Publication number: 20240330201
    Abstract: A system and method for address translation in a multi-node computing system. In some embodiments, the system includes a first node. The first node may include: a core; and a global address translation circuit, the core including: a core processing circuit; and a memory management unit configured to map local virtual addresses to global virtual addresses, the global address translation circuit being configured to map global virtual addresses to global physical addresses.
    Type: Application
    Filed: December 8, 2023
    Publication date: October 3, 2024
    Inventors: Alan Gara, Robert Wisniewski, Douglas Joseph, Samantika Sury, Jai Dayal, Rolf Riesen
  • Publication number: 20240311316
    Abstract: A computing node in a multi-node computing system includes a local memory, at least one processor, and an access library. The at least one processor runs an operating system that runs a distributed application in a virtual address space. The application includes a process that generates a first memory access request that includes a first virtual address. The access library is responsive to the first memory access request by: converting the first virtual address into a first physical address, accessing the local memory based on the first physical address including a first indication that the first memory access request is for the local memory, and accessing a global access tuple table based on the first physical address including a second indication that the first memory access request is for memory located on a second computing node of the multi-node computing system that is remotely located from the computing node.
    Type: Application
    Filed: September 14, 2023
    Publication date: September 19, 2024
    Inventors: David LOMBARD, Robert WISNIEWSKI, Douglas JOSEPH, Matthew WOLF, Jai DAYAL, James LOO, Andrew TAUFERNER, Rolf RIESEN
  • Publication number: 20240311308
    Abstract: Systems and methods for computing with multiple nodes. In some embodiments, the method includes: determining that a first data value in a cache is a global data value; setting a first flag to indicate that the first data value is a global data value; and selectively invalidating one or more portions of the cache, wherein the selective invalidating of the cache includes: determining, based on the first flag, that the first data value is a global data value; and based on the determining, invalidating the first data value.
    Type: Application
    Filed: December 8, 2023
    Publication date: September 19, 2024
    Inventors: Arun Francis RODRIGUES, Alan GARA, Douglas JOSEPH, Jai DAYAL, David LOMBARD, Manisha GAJBE, Andrew TAUFERNER, Casey THIELEN, Ping ZOU, Samantika SURY, Eric BORCH, Zaid MCKIE KRISBERG, Robert WISNIEWSKI
  • Publication number: 20240311289
    Abstract: A method to address memory in nodes of a distributed memory system includes partitioning the memory in each node into one or more memory blocks available for a global memory pool. The method also includes combining, in response to a request to address memory in the global memory pool, a global bit from a global page table with a physical address to generate a global virtual address. The global bit indicates whether the memory is local or remote. The method also includes translating, using global access tuple (GAT) tables, the global virtual address to a global physical address, and addressing a memory block in the global memory pool based on the global physical address.
    Type: Application
    Filed: March 1, 2024
    Publication date: September 19, 2024
    Inventors: David Lombard, Robert Wisniewski, Douglas Joseph, Matthew Wolf, Jai Dayal, James Loo, Andrew Thomas Tauferner, Rolf Riesen
  • Publication number: 20240311315
    Abstract: Systems and methods for computing with multiple nodes. In some embodiments, a method includes: reading, by a first node of a plurality of nodes, from a shared memory shared by the nodes, a first data value; modifying, by the first node, the first data value; storing, by the first node, the modified first data value in a cache of the first node; initiating, by the first node, a global synchronization command; and in response to the initiating, by the first node, of the global synchronization command: indicating, by the first node, that the first node has completed a time step synchronization.
    Type: Application
    Filed: October 9, 2023
    Publication date: September 19, 2024
    Inventors: Alan GARA, Douglas JOSEPH, Arun RODRIGUES, Samantika SURY, Rolf RIESEN, Robert WISNIEWSKI
  • Publication number: 20240311180
    Abstract: A method of migrating threads across a first node running a first operating system and a second node running a second operating system that is a different instance than the first operating system. The method includes a task of receiving, by a thread daemon of the first node, a request from a process on the first node to migrate a thread of the process to the second node. The method also includes a task of sending, by the thread daemon of the first node, the request to a thread daemon of the second node, a task of creating, by the thread daemon of the second node, a thread entry in a thread proxy of the second node and a proxy process on the second node, and a task of instantiating the thread within the proxy process.
    Type: Application
    Filed: November 14, 2023
    Publication date: September 19, 2024
    Inventors: Robert Wisniewski, Rolf Riesen
  • Patent number: 11500443
    Abstract: A system and method for energy conservation in a virtual universe, the method comprising: determining, at a server, available energy conservation options associated with an avatar of the virtual universe; determining, at the server, selected energy conservation options of the available energy conservation options; and applying, at the server, the selected energy conservation options to portions of the virtual universe associated with the avatar.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: November 15, 2022
    Assignee: KYNDRYL, INC.
    Inventors: Rick A. Hamilton, II, John P. Karidis, Clifford A. Pickover, Robert Wisniewski
  • Publication number: 20210326171
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to relocate a compute thread, the apparatus comprising control circuitry to maintain a location of a plurality of domain access counters associated with a plurality of compute-memory domains for a first compute thread, and an execution monitor to set a first domain access counter of the plurality of domain access counters, the first domain access counter associated with a first compute-memory domain of the compute-memory domains, and relocate the first compute thread to a second compute-memory domain of the compute-memory domains in response to a comparison between a second domain access counter associated with the second compute-memory domain and the first domain access counter.
    Type: Application
    Filed: June 26, 2021
    Publication date: October 21, 2021
    Inventors: Rolf Riesen, Robert Wisniewski, Rajesh Poornachandran
  • Publication number: 20200042072
    Abstract: A system and method for energy conservation in a virtual universe, the method comprising: determining, at a server, available energy conservation options associated with an avatar of the virtual universe; determining, at the server, selected energy conservation options of the available energy conservation options; and applying, at the server, the selected energy conservation options to portions of the virtual universe associated with the avatar.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 6, 2020
    Inventors: Rick A. Hamilton, II, John P. Karidis, Clifford A. Pickover, Robert Wisniewski
  • Patent number: 10466762
    Abstract: A system and method for energy conservation in a virtual universe, the method comprising: determining, at a server, available energy conservation options associated with an avatar of the virtual universe; determining, at the server, selected energy conservation options of the available energy conservation options; and applying, at the server, the selected energy conservation options to portions of the virtual universe associated with the avatar.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: November 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Rick A. Hamilton, II, John P. Karidis, Clifford A. Pickover, Robert Wisniewski
  • Patent number: 9724610
    Abstract: Useful work or services can be automated or otherwise facilitated or solutions to real world events developed by emulation of a real-world environment (which can contain objects representing virtual objects) with a virtual environment and generating a prioritized sequence of locations and associated tasks in accordance with resources related to the event in a virtual universe. Performance of the prioritized tasks at the prioritized locations is facilitated in the virtual universe by locally generating teleportation invitations corresponding to locations in the ordered sequence of locations.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventors: Christopher J. Dawson, Rick Allen Hamilton, II, Clifford A. Pickover, Robert Wisniewski
  • Publication number: 20160162009
    Abstract: A system and method for energy conservation in a virtual universe, the method comprising: determining, at a server, available energy conservation options associated with an avatar of the virtual universe; determining, at the server, selected energy conservation options of the available energy conservation options; and applying, at the server, the selected energy conservation options to portions of the virtual universe associated with the avatar.
    Type: Application
    Filed: January 29, 2016
    Publication date: June 9, 2016
    Inventors: Rick A. Hamilton, II, John P. Karidis, Clifford A. Pickover, Robert Wisniewski
  • Patent number: 9268385
    Abstract: In some embodiments, a method comprises hosting a virtual universe in which one or more avatars interact with one or more virtual objects. The method can also include presenting energy conservation options that reduce amounts of power consumed in rendering the avatars and virtual objects in the virtual universe, detecting a selection of the energy conservation options, and configuring logic for rendering the avatars and virtual objects according to the selected energy conservation options. The method can also comprise rendering, according to the selection of energy conservation options, the avatars and virtual objects in the virtual universe.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: February 23, 2016
    Assignee: International Business Machines Corporation
    Inventors: Rick A. Hamilton, II, John P. Karidis, Clifford A. Pickover, Robert Wisniewski
  • Patent number: 8893049
    Abstract: Useful work or services can be automated or otherwise facilitated or solutions to real world events developed by emulation of a real-world environment (which can contain objects representing virtual objects) with a virtual environment and generating a prioritized sequence of locations and associated tasks in accordance with resources related to the event in a virtual universe. Performance of the prioritized tasks at the prioritized locations is facilitated in the virtual universe by locally generating teleportation invitations corresponding to locations in the ordered sequence of locations.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Christopher J. Dawson, Rick A. Hamilton, II, Clifford A. Pickover, Robert Wisniewski
  • Patent number: 8856742
    Abstract: In an embodiment, a first debug agent at a first computer receives a packet. The first debug agent adds a debug command and an identifier of the first debug agent to the packet and sends the packet to a receiving computer. A second debug agent at the receiving computer removes the debug command and the identifier of the first debug agent from the packet and sends the packet to a second program that executes at the receiving computer. The second debug agent further executes the debug command, which causes the second program that executes on the receiving computer to halt execution at a breakpoint or address watch memory location. The second debug agent sends the state of the second program to the first debug agent, which presents, at the first computer, the state and a listing of the second program.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Branda, William T. Newport, John J. Stecher, Robert Wisniewski