Patents by Inventor Robert Zwonik

Robert Zwonik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of fabricating copper damascene and dual damascene interconnect wiring
    Patent number: 8349728
    Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: January 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, William Hill, Kenneth E. McAvey, Jr., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow, Robert Zwonik
  • METHOD OF FABRICATING COPPER DAMASCENE AND DUAL DAMASCENE INTERCONNECT WIRING
    Publication number: 20120064718
    Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.
    Type: Application
    Filed: November 22, 2011
    Publication date: March 15, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey P. Gambino, William Hill, Kenneth E. McAvey, JR., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow, Robert Zwonik
  • Copper damascene and dual damascene interconnect wiring
    Patent number: 8106513
    Abstract: A copper corrosion resistant integrated circuit. The integrated circuit including: a substrate; a copper diffusion barrier layer on the substrate; a dielectric layer on a top surface of the copper diffusion barrier layer; a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; a first capping layer on the top surface of the wire and the top surface of the dielectric layer; and a second capping layer on a top surface of the first capping layer.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, William Hill, Kenneth E. McAvey, Jr., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow, Robert Zwonik
  • Method of fabricating copper damascene and dual damascene interconnect wiring
    Patent number: 7678683
    Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: March 16, 2010
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, William Hill, Kenneth E. McAvey, Jr., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow, Robert Zwonik
  • METHOD OF FABRICATING COPPER DAMASCENE AND DUAL DAMASCENE INTERCONNECT WIRING
    Publication number: 20100052172
    Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 4, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey P. Gambino, William Hill, Kenneth E. McAvey, JR., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow, Robert Zwonik
  • METHOD OF FABRICATING COPPER DAMASCENE AND DUAL DAMASCENE INTERCONNECT WIRING
    Publication number: 20070059920
    Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.
    Type: Application
    Filed: November 1, 2006
    Publication date: March 15, 2007
    Inventors: Jeffrey Gambino, William Hill, Kenneth McAvey, Thomas McDevitt, Anthony Stamper, Arthur Winslow, Robert Zwonik
  • Method of fabricating copper damascene and dual damascene interconnect wiring
    Patent number: 7176119
    Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: February 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, William Hill, Kenneth F. McAvey, Jr., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow, Robert Zwonik
  • METHOD OF FABRICATING COPPER DAMASCENE AND DUAL DAMASCENE INTERCONNECT WIRING
    Publication number: 20060063373
    Abstract: An integrated circuit and a method of manufacturing the integrated circuit, the method including: (a) providing a substrate; (b) forming a copper diffusion barrier layer on the substrate; (c) forming a dielectric layer on a top surface of the copper diffusion barrier layer; (d) forming a copper damascene or dual damascene wire in the dielectric layer, a top surface of the copper damascene or dual damascene wire coplanar with a top surface of the dielectric layer; (e) forming a first capping layer on the top surface of the wire and the top surface of the dielectric layer; (f) after step (e) performing one or more characterization procedures in relation to said integrated circuit; and (g) after step (e) forming a second capping layer on a top surface of the first capping layer.
    Type: Application
    Filed: September 20, 2004
    Publication date: March 23, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey Gambino, William Hill, Kenneth McAvey, Thomas McDevitt, Anthony Stamper, Arthur Winslow, Robert Zwonik