Abstract: An organic thin film transistor includes a dielectric layer and an active layer overlapping the dielectric layer, a source contact and a drain contact arranged on a surface of the active layer opposite the dielectric layer and mutually separated by an intermediate region, the source contact and drain contact having first and second inner walls, respectively, facing the intermediate region, and a gate contact arranged on a portion of another surface of the dielectric layer opposite the active layer and having first and second side walls aligned with the first and second inner walls, respectively.

Abstract: A process for manufacturing an organic thin film transistor includes the steps of arranging a shaping element having a first profile defining a slot, forming a mold suitable to define a cavity with the shaping element, depositing source and drain layers, an active material layer and a dielectric layer within the cavity, depositing a gate layer in the slot of the shaping element, and transferring the gate layer in contact with the dielectric layer by means of the shaping element.

Abstract: An organic thin film transistor includes a dielectric layer and an active layer overlapping the dielectric layer, a source contact and a drain contact arranged on a surface of the active layer opposite the dielectric layer and mutually separated by an intermediate region, the source contact and drain contact having first and second inner walls, respectively, facing the intermediate region, and a gate contact arranged on a portion of another surface of the dielectric layer opposite the active layer and having first and second side walls aligned with the first and second inner walls, respectively.

Abstract: A process for manufacturing a non-volatile memory structure, in particular of a cross-point type provided with an array of memory cells, including forming bottom electrodes on a substrate; forming areas of active material on the bottom electrodes; and forming top electrodes on the areas of active material. The memory cells are defined at the intersection of the bottom electrode with the top electrode. At least one from among the steps of forming bottom electrodes, forming areas of active material, and forming top electrodes includes using soft-lithography techniques, chosen from amongst “microtransfer molding”, “micromolding in capillary”, and “microcontact printing”.

Abstract: A process for manufacturing a non-volatile memory structure, in particular of a cross-point type provided with an array of memory cells, including forming bottom electrodes on a substrate; forming areas of active material on the bottom electrodes; and forming top electrodes on the areas of active material. The memory cells are defined at the intersection of the bottom electrode with the top electrode. At least one from among the steps of forming bottom electrodes, forming areas of active material, and forming top electrodes includes using soft-lithography techniques, chosen from amongst “microtransfer molding”, “micromolding in capillary”, and “microcontact printing”.

Abstract: A process for manufacturing an organic thin film transistor includes the steps of arranging a shaping element having a first profile defining a slot, forming a mold suitable to define a cavity with the shaping element, depositing source and drain layers, an active material layer and a dielectric layer within the cavity, depositing a gate layer in the slot of the shaping element, and transferring the gate layer in contact with the dielectric layer by means of the shaping element