Patents by Inventor Roberto Pellicano'

Roberto Pellicano' has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit for limiting the output voltage of a monolithic semiconductor power device which drives a resonant load connected to a power supply
    Patent number: 5189317
    Abstract: A limiting circuit comprises a comparator (B), which makes a comparison between the output voltage (Vc) of a power device and a predetermined reference voltage (Vrif). In the case wherein the output voltage is just below the reference voltage, the comparator supplies a current to the load (L) suitable for preventing the output voltage from falling further below the reference voltage.
    Type: Grant
    Filed: October 22, 1990
    Date of Patent: February 23, 1993
    Assignee: SGS-Thomson Microelectronics
    Inventors: Sergio Palara, Mario Paparo, Roberto Pellicano
  • Integrated structure for a signal transfer network, in particular for a pilot circuit for MOS power transistors
    Patent number: 4969030
    Abstract: The integrated structure is formed of various circuital components accomplished by diffusion of dopants in a semiconductor substrate. Each component is located inside a respective insulation recess electrically floating in relation to the substrate and the other components.
    Type: Grant
    Filed: April 3, 1990
    Date of Patent: November 6, 1990
    Assignee: SGS-Thomson Microelectronics S.p.A.
    Inventors: Salvatore Musumeci, Roberto Pellicano, Sergio Palara