Abstract: The invention relates to a CMOS device (10) with an NMOST I and PMOST 2 having gate regions (1D,2D) comprising a compound containing both a metal and a further element. According to the invention the first and second conducting material both comprise a compound containing as the metal a metal selected from the group comprising molybdenum and tungsten and both comprise as the further element an element selected from the group comprising carbon, oxygen and the chalcogenides. Preferably both the first and second conducting material comprise a compound of molybdenum and carbon or oxygen. The invention also provides an attractive method of manufacturing such a device.

Abstract: The invention relates to a CMOS device (10) with an NMOST I and PMOST 2 having gate regions (1D,2D) comprising a compound containing both a metal and a further element. According to the invention the first and second conducting material both comprise a compound containing as the metal a metal selected from the group comprising molybdenum and tungsten and both comprise as the further element an element selected from the group comprising carbon, oxygen and the chalcogenides. Preferably both the first and second conducting material comprise a compound of molybdenum and carbon or oxygen. The invention also provides an attractive method of manufacturing such a device.

Abstract: A method of providing an electric device with a vertical component and the device itself are disclosed. The electric device may be a transistor device, such as a FET device, with a vertical channel, such as a gate around transistor, or double-gate transistor First an elongate structure, such as a nanowire is provided to a substrate. Subsequently, a first conductive layer separated from the substrate and from the elongate structure by a dielectric layer is provided. Further, a second conductive layer being separated from the first conductive layer by a separation layer is being provided in contact with at least a top section of the elongate structure.

Abstract: The semiconductor device (11) of the invention comprises a circuit and a protecting structure (50). It is provided with a first and a second security element (12A, 12B) and with an input and an output (14,15). The security elements (12A, 12B) have a first and a second impedance, respectively, which impedances differ. The device is further provided with measuring means, processing means and connection means. The processing means transform any first information received into a specific program of measurement. Herewith a challenge-response mechanism is implemented in the device (11).

Abstract: A method of manufacturing an electronic device is provided wherein an interconnect is made using 193 nm lithography. No deformation of the desired linewidth takes place in that during a plasma gas is used which dissociates in low-weight ions. The electronic device is particularly an integrated circuit.

Abstract: The electric device (1, 100) has a body (2, 102) having a resistor (7, 107) comprising a phase change material being changeable between a first phase and a second phase. The resistor (7, 107) has a first electrical resistance when the phase change material is in the first phase and a second electrical resistance, different from the first electrical resistance, when the phase change material is in the second phase. The body (2, 102) further has a heating element (6, 106) being able to conduct a current for enabling a transition from the first phase to the second phase. The heating element (6, 106) is arranged in parallel with the resistor (7, 107).

Abstract: Method of manufacturing a semiconductor device comprising MOS transistors having gate electrodes (15, 16) formed in a number of metal layers (8, 9, 13; 8, 12, 13) deposited upon one another. In this method, active silicon regions (4, 5) provided with a layer of a gate dielectric (7) and field-isolation regions (6) insulating these regions with respect to each other are formed in a silicon body (1). Then, a layer off a first metal (8) is deposited in which locally, at the location of a part of the active regions (4), nitrogen is introduced. On the layer of the first metal, a layer of a second metal (13) is then deposited, after which the gate electrodes are etched in the metal layers. Before nitrogen is introduced into the first metal layer, an auxiliary layer of a third metal (9) which is permeable to nitrogen is deposited on the first metal layer. Thus, the first metal layer can be nitrided locally without the risk of damaging the underlying gate dielectric.

Abstract: The electric device (1, 100) has a body (2, 101) with a resistor (7, 250) comprising a phase change material being changeable between a first phase and a second phase. The resistor (7, 250) has an electric resistance which depends on whether the phase change material is in the first phase or the second phase. The resistor (7, 250) is able to conduct a current for enabling a transition from the first phase to the second phase. The phase change material is a fast growth material which may be a composition of formula Sb1-cMc with c satisfying 0.05?c?0.61, and M being one or more elements selected from the group of Ge, In, Ag, Ga, Te, Zn and Sn, or a composition of formula SbaTebX100-(a+b) with a, b and 100-(a+b) denoting atomic percentages satisfying 1?a/b?8 and 4?100-(a+b)?22, and X being one or more elements selected from Ge, In, Ag, Ga and Zn.

Abstract: The electric device (100) has a body (102) having a resistor (107) comprising a phase change material being changeable between a first phase and a second phase. The resistor (107) has a first electrical resistance when the phase change material is in the first phase, and a second electrical resistance, different from the first electrical resistance, when the phase change material is in the second phase. The phase change material constitutes a conductive path between a first contact area and a second contact area. A cross-section of the conductive path is smaller than the first contact area and the second contact area. The body (102) may further have a heating element 106 being able to conduct a current for enabling a transition from the first phase to the second phase. The heating element (106) is preferably arranged in parallel with the resistor (107).

Abstract: The present invention provides for a method of providing copper metallization on a semiconductor body, including the step of depositing copper in a nitrogen-containing atmosphere so as to form a nitrogen-containing copper seed layer and forming the copper metallization on the seed layer, and also including the step of heating the seed layer so as to release the nitrogen to form part of a barrier layer separating the seed layer from the semiconductor body.

Abstract: The semiconductor device (11) of the invention comprises a circuit covered by a passivation structure (50). It is provided with a first and a second security element (12A, 12B) which comprise local areas of the passivation structure (50), and with a first and a second electrode (14,15). The security elements (12A, 12B) have a first and a second impedance, respectively, which impedances differ. This is realized in that the passivation structure has an effective dielectric constant that varies laterally over the circuit. Actual values of the impedances are measured by measuring means and transferred to an access device by transferring means. The access device comprises or has access to a central database device for storing the impedances. The access device furthermore may compare the actual values with the stored values of the impedances in order to check the authenticity or the identity of the semiconductor device.

Abstract: The semiconductor device (11) of the invention comprises a circuit that is covered by a passivation structure. It is provided with a first security element (12) that comprises a local area of the passivation structure and which has a first impedance. Preferably, a plurality of security elements (12) is present, whose the impedances differ. The semiconductor device (11) further comprises measuring means (4) for measuring an actual value of the first impedance, and a memory (7) comprising a first memory element (7A) for storing the actual value as a first reference value in the first memory element (7A). The semiconductor device (11) of the invention can be initialized by a method wherein the actual value is stored as the first reference value. Its authenticity can be checked by comparison of the actual value again measured and the first reference value.