Patents by Inventor Robin Han

Robin Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10956148
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: March 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10817311
    Abstract: Provided are a computer program product, system, and method for applying a machine learning algorithm to problem analysis in a code load operation of a data storage system. A code load driver is provided that receives code load operation information for an event during a code load operation in the storage system. The code load operation information indicates an error in the code load operation at a time of the event. A portion of the code load inform is processed by a machine learning to obtain a label indicating whether to halt the code load operation. In response to a label indicating the code load operation is to be halted, the code load operation is halted.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: October 27, 2020
    Assignee: International Business Machines Corporation
    Inventors: Robin Han, Edward H. Lin, Mingzhi Zhao
  • Publication number: 20200081702
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10540170
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: January 21, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Publication number: 20190012165
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Application
    Filed: September 12, 2018
    Publication date: January 10, 2019
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10114633
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: October 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10078507
    Abstract: Provided are techniques for code load processing. While performing code load processing of a set of modules of a same module type, it is determined that a first module in the set of modules is not in an operational state. It is determined that a second module is a redundant module for the first module. In response to determining that the second module is in an operational state and has already completed code update, the code load processing is continued. In response to determining that the second module is in an operational state and has not already completed code update, it is determined whether there is a third redundant module that is in an operational state. In response to determining that there is a third redundant module that is in an operational state, the code load processing is continued.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: September 18, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael P. Groover, Robin Han, Edward H. Lin, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou
  • Patent number: 10042627
    Abstract: Provided are techniques for code load processing. While performing code load processing of a set of modules of a same module type, it is determined that a first module in the set of modules is not in an operational state. It is determined that a second module is a redundant module for the first module. In response to determining that the second module is in an operational state and has already completed code update, the code load processing is continued. In response to determining that the second module is in an operational state and has not already completed code update, it is determined whether there is a third redundant module that is in an operational state. In response to determining that there is a third redundant module that is in an operational state, the code load processing is continued.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: August 7, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael P. Groover, Robin Han, Edward H. Lin, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou
  • Publication number: 20180165082
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 14, 2018
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 9696986
    Abstract: A system for managing a code load for a storage system is disclosed. The system can include instantiating a code load. The code load can include a first update for a first component and a second update for a second component. The system can include monitoring the operational state of the first and second components in response to instantiating the code load. The system can also include determining to perform the first update in response to a triggering event. The system can also include performing the first update in response to determining to perform the first update.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: July 4, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michael P. Groover, Robin Han, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou
  • Patent number: 9674105
    Abstract: Provided are a computer program product, system, and method for applying a platform code level update to update a source partition in a computing system. Computational resources in the computing system are allocated to a destination partition. A code load is applied to the destination partition to implement an updated platform code level comprising an update to the platform code level on the source partition while the source partition is operational and processing computing requests. Submission of new transactions to the source partition is blocked in response to applying the code load to the destination partition. An operational environment and system state at the source partition are migrated to the destination partition in response to blocking submission of new transactions to the source partition. Transactions are directed to the destination partition intended for the source partition in response to migrating the operational environment and system state to the destination partition.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: June 6, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael P. Groover, Robin Han, Yan Su, Wei Tang, Ming Z. Zhao, Yi Zhou
  • Patent number: 9600265
    Abstract: A sequence for distributing at least one of a plurality of code packages to the at least one facility according to different states of a fixed state machine is set. The at least one of the plurality of code packages is maintained in at least one staging area in a valid, dormant mode while the fixed state machine is stopped. Pursuant to a resumption of the fixed state machine at a subsequent time, a current code package is swapped with the at least one of the plurality of code packages in the at least one staging area to activate the at least one of the plurality of code packages.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: March 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Franck Excoffier, Michael P. Groover, Robin Han, Andreas B. M. Koster, Edward H. Lin, Mario Sweeney
  • Patent number: 9557984
    Abstract: Provided are a computer program product, system, and method for performing code load operations on managed components in a system. A first node group comprising at least one computational node in the computer system performs code load operations for the managed components. Status of the code load operations at the managed component is written to a status data structure while the code load operations are being performed at the managed component. The first node group transfers control of the code load operations for the managed components to a second node group comprising at least computational node in the computer system while the code load operations are occurring at the managed components. A second node group reads the status data structure for the managed components to determine the status of the code load operations and continue the code load operations at managed components.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: January 31, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael P. Groover, Robin Han, Cindy K. Hoac, Ronald D. Martens, Tony J. Zhang
  • Publication number: 20160274886
    Abstract: Provided are a computer program product, system, and method for performing code load operations on managed components in a system. A first node group comprising at least one computational node in the computer system performs code load operations for the managed components. Status of the code load operations at the managed component is written to a status data structure while the code load operations are being performed at the managed component. The first node group transfers control of the code load operations for the managed components to a second node group comprising at least computational node in the computer system while the code load operations are occurring at the managed components. A second node group reads the status data structure for the managed components to determine the status of the code load operations and continue the code load operations at managed components.
    Type: Application
    Filed: March 16, 2015
    Publication date: September 22, 2016
    Inventors: MICHAEL P. GROOVER, ROBIN HAN, CINDY K. HOAC, RONALD D. MARTENS, TONY J. ZHANG
  • Publication number: 20160210139
    Abstract: A system for managing a code load for a storage system is disclosed. The system can include instantiating a code load. The code load can include a first update for a first component and a second update for a second component. The system can include monitoring the operational state of the first and second components in response to instantiating the code load. The system can also include determining to perform the first update in response to a triggering event. The system can also include performing the first update in response to determining to perform the first update.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 21, 2016
    Inventors: Michael P. Groover, Robin Han, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou
  • Publication number: 20160188319
    Abstract: Provided are techniques for code load processing. While performing code load processing of a set of modules of a same module type, it is determined that a first module in the set of modules is not in an operational state. It is determined that a second module is a redundant module for the first module. In response to determining that the second module is in an operational state and has already completed code update, the code load processing is continued. In response to determining that the second module is in an operational state and has not already completed code update, it is determined whether there is a third redundant module that is in an operational state. In response to determining that there is a third redundant module that is in an operational state, the code load processing is continued.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 30, 2016
    Inventors: Michael P. Groover, Robin Han, Edward H. Lin, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou
  • Publication number: 20160170737
    Abstract: Provided are techniques for code load processing. While performing code load processing of a set of modules of a same module type, it is determined that a first module in the set of modules is not in an operational state. It is determined that a second module is a redundant module for the first module. In response to determining that the second module is in an operational state and has already completed code update, the code load processing is continued. In response to determining that the second module is in an operational state and has not already completed code update, it is determined whether there is a third redundant module that is in an operational state. In response to determining that there is a third redundant module that is in an operational state, the code load processing is continued.
    Type: Application
    Filed: February 25, 2016
    Publication date: June 16, 2016
    Inventors: Michael P. Groover, Robin Han, Edward H. Lin, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou
  • Patent number: 9329856
    Abstract: A method and system for managing a code load for a storage system is disclosed. The method and system can include instantiating a code load. The code load can include a first update for a first component and a second update for a second component. The method and system can include monitoring the operational state of the first and second components in response to instantiating the code load. The method and system can also include determining to perform the first update in response to a triggering event. The method and system can also include performing the first update in response to determining to perform the first update.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: May 3, 2016
    Assignee: International Business Machines Corporation
    Inventors: Michael P. Groover, Robin Han, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou
  • Patent number: 9298501
    Abstract: A setup module organizes a single software image for a management command. A process module creates a plurality of processes independently executing the management command on each of the plurality of devices from a management console. Each process employs the software image. A termination module ends the management command after each process has completed on each of the plurality of devices.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: March 29, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Franck Excoffier, Michael P. Groover, Robin Han, Mario Kiessling, Yang Liu, Diana Y. Ong
  • Patent number: 9286056
    Abstract: Provided are techniques for code load processing. While performing code load processing of a set of modules of a same module type, it is determined that a first module in the set of modules is not in an operational state. It is determined that a second module is a redundant module for the first module. In response to determining that the second module is in an operational state and has already completed code update, the code load processing is continued. In response to determining that the second module is in an operational state and has not already completed code update, it is determined whether there is a third redundant module that is in an operational state. In response to determining that there is a third redundant module that is in an operational state, the code load processing is continued.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: March 15, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael P. Groover, Robin Han, Edward H. Lin, Yan Su, Wei Tang, Ming Zhi Zhao, Yi Zhou