Patents by Inventor Robin M. Wilson

Robin M. Wilson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8913457
    Abstract: Memory circuitry includes memory components operable in response to first edges of an internal clock. The memory circuitry also includes internal clock generating circuitry to generate the internal clock in response to a system clock. The first edges of the internal clock are generated in response to both a rising and a falling edge of the system clock.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: December 16, 2014
    Assignees: STMicroelectronics International N.V., STMicroelectronics SA
    Inventors: Nishu Kohli, Robin M. Wilson
  • Publication number: 20140241102
    Abstract: A memory circuitry includes memory components operable in response to first edges of an internal clock; and internal clock generating circuitry to generate the internal clock in response to a system clock, wherein the first edges of the internal clock are generated in response to both a rising and a falling edge of the system clock.
    Type: Application
    Filed: May 6, 2014
    Publication date: August 28, 2014
    Applicants: STMicroelectronics International N.V., STMicroelectronics, SA
    Inventors: Nishu KOHLI, Robin M. WILSON
  • Patent number: 8730756
    Abstract: A memory circuitry includes memory components operable in response to first edges of an internal clock; and internal clock generating circuitry to generate the internal clock in response to a system clock, wherein the first edges of the internal clock are generated in response to both a rising and a falling edge of the system clock.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: May 20, 2014
    Assignees: STMicroelectronics International N.V., STMicroelectronics, SA
    Inventors: Nishu Kohli, Robin M. Wilson
  • Publication number: 20130142003
    Abstract: A memory circuitry includes memory components operable in response to first edges of an internal clock; and internal clock generating circuitry to generate the internal clock in response to a system clock, wherein the first edges of the internal clock are generated in response to both a rising and a falling edge of the system clock.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 6, 2013
    Applicants: STMicroelectronics, SA, STMicroelectronics Pvt Ltd.
    Inventors: Nishu Kohli, Robin M. Wilson