Patents by Inventor Robin Mcree

Robin Mcree has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • GLASS CORE PROTECTION USING PERIPHERAL BUFFER LAYERS
    Publication number: 20250112136
    Abstract: Embodiments disclosed herein include apparatuses with glass core package substrates. In an embodiment, an apparatus comprises a substrate with a first surface and a second surface opposite from the first surface. A sidewall is between the first surface and the second surface, and the substrate comprises a glass layer. In an embodiment, a via is provided through the substrate between the first surface and the second surface, and the via is electrically conductive. In an embodiment, a layer in contact with the sidewall of the substrate surrounds a perimeter of the substrate.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: Bohan SHAN, Jesse JONES, Zhixin XIE, Bai NIE, Shaojiang CHEN, Joshua STACEY, Mitchell PAGE, Brandon C. MARIN, Jeremy D. ECTON, Nicholas S. HAEHN, Astitva TRIPATHI, Yuqin LI, Edvin CETEGEN, Jason M. GAMBA, Jacob VEHONSKY, Jianyong MO, Makoyi WATSON, Shripad GOKHALE, Mine KAYA, Kartik SRINIVASAN, Haobo CHEN, Ziyin LIN, Kyle ARRINGTON, Jose WAIMIN, Ryan CARRAZZONE, Hongxia FENG, Srinivas Venkata Ramanuja PIETAMBARAM, Gang DUAN, Dingying David XU, Hiroki TANAKA, Ashay DANI, Praveen SREERAMAGIRI, Yi LI, Ibrahim EL KHATIB, Aaron GARELICK, Robin MCREE, Hassan AJAMI, Yekan WANG, Andrew JIMENEZ, Jung Kyu HAN, Hanyu SONG, Yonggang Yong LI, Mahdi MOHAMMADIGHALENI, Whitney BRYKS, Shuqi LAI, Jieying KONG, Thomas HEATON, Dilan SENEVIRATNE, Yiqun BAI, Bin MU, Mohit GUPTA, Xiaoying GUO
  • DEVICE AND METHOD FOR REAL-TIME OFFSET ADJUSTMENT OF A SEMICONDUCTOR DIE PLACEMENT
    Publication number: 20240312819
    Abstract: A method for real-time offset adjustment of a semiconductor die placement comprising: obtaining or receiving operational parameters of a die mounting tool in real-time, wherein the die mounting tool is configured for placing the semiconductor die on a panel; predicting an offset adjustment of the semiconductor die placement based on the operational parameters; and determining semiconductor die placement coordinates based on an original die placement and the offset adjustment.
    Type: Application
    Filed: March 17, 2023
    Publication date: September 19, 2024
    Inventors: Hong Seung YEON, Mariano PHIELIPP, Yi LI, Minglu LIU, Robin McREE, Yosuke KANAOKA, Gang DUAN
  • OVERLYING FIDUCIAL DESIGN FOR GLASS PLACEMENT ACCURACY IMPROVEMENT
    Publication number: 20240178151
    Abstract: Embodiments disclosed herein include a package architecture. In an embodiment, the package architecture comprises a first substrate with a first fiducial mark on a surface of the first substrate. In an embodiment, the package architecture further comprises a second substrate over the first substrate, where the second substrate comprises glass and a second fiducial mark on the second substrate, and where a footprint of the second fiducial mark at least partially overlaps a footprint of the first fiducial mark.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Minglu LIU, Alexander AGUINAGA, Gang DUAN, Jung Kyu HAN, Yosuke KANAOKA, Yi LI, Robin MCREE, Hong Seung YEON
  • DIRECTLY COUPLED OPTICAL INTERPOSER
    Publication number: 20240111090
    Abstract: A device comprises a substrate and an IC die, which may be a photonic IC. The substrate comprises a first surface, a second surface opposite the first surface, an optical waveguide integral with the substrate, and a hole extending from the first surface to the second surface. The hole comprises a first sidewall. The optical waveguide is between the first surface and the second surface, parallel to the first surface, and comprises a first end which extends to the first sidewall. The IC die is within the hole and comprises a second sidewall and an optical port at the second sidewall. The second sidewall is proximate to the first sidewall and the first end of the optical waveguide is proximate to and aligned with the optical port. The substrate may include a recess to receive another device comprising a socket.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Robert A. May, Tarek Ibrahim, Shriya Seshadri, Kristof Darmawikarta, Hiroki Tanaka, Changhua Liu, Bai Nie, Lilia May, Srinivas Pietambaram, Zhichao Zhang, Duye Ye, Yosuke Kanaoka, Robin McRee
  • DEVICE AND METHOD FOR IMPROVED FIDUCIAL MARKER DETECTION
    Publication number: 20240078702
    Abstract: A method for recognizing a reference point associated with a fiducial marker including the steps of: obtaining or receiving image data of the fiducial marker; determining the degree of which the image data of the fiducial marker is aligned with one or more reference images; of which if the degree of alignment is determined to be less than an acceptable threshold predicting a set of coordinates of the reference point associated with the fiducial marker; incorporating the set of coordinates with the image data to form a modified image data; and determining the degree of which the modified image data of the fiducial marker is aligned with one or more reference images.
    Type: Application
    Filed: September 5, 2022
    Publication date: March 7, 2024
    Inventors: Yi LI, Hong Seung YEON, Nicholas HAEHN, Wei LI, Raquel DE SOUZA BORGES FERREIRA, Minglu LIU, Robin McREE, Yosuke KANAOKA, Gang DUAN, Arnab ROY
  • FIDUCIAL FOR AN ELECTRONIC DEVICE
    Publication number: 20230089684
    Abstract: A substrate for an electronic device may include one or more layers. The substrate may include a cavity defined in the substrate. The cavity may be adapted to receive a semiconductor die. The substrate may include a fiducial mark positioned proximate the cavity. The fiducial mark may be exposed on a first surface of the substrate. The fiducial mark may include a first region including a dielectric filler material. The fiducial mark may include a second region including a conductive filler material. In an example, the second region surrounds the first region. In another example, the dielectric filler material has a lower reflectivity in comparison to the conductive filler material to provide a contrast between the first region and the second region.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 23, 2023
    Inventors: Yosuke Kanaoka, Robin Mcree, Gang Duan, Gautam Medhi, Huang-Ta Chen
  • DEVICES AND METHODS TO MINIMIZE DIE SHIFT IN EMBEDDED HETEROGENEOUS ARCHITECTURES
    Publication number: 20230078395
    Abstract: Disclosed herein are embedded heterogeneous architectures having minimized die shift and methods for manufacturing the same. The architectures may include a substrate, a bridge, and a material attached to the substrate. The substrate may include a first subset of vias and a second subset of vias. The bridge may be located in between the first subset and the second subset of vias. The material may include a first portion located proximate the first subset of vias, and a second portion located proximate the second subset of vias. The first and second portions may define a partial boundary of a cavity formed within the substrate and the bridge may be located within the cavity.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Inventors: Robin Mcree, Yosuke Kanaoka, Gang Duan, Jinhe Liu, Timothy A. Gosselin