Abstract: A cellular telephone apparatus in which several functions such as decoding and encoding data signals, detecting the busy/idle bit and transponding the SAT signal, are carried out by a CMOS data processor (20) which is separate from a CMOS micro-controller (34). The data processor (20) can be operated at a lower clock frequency (1.2 MHz) than the micro-controller (34) which enables current to be saved compared to processing these functions in software using the micro-controller.

Abstract: An arrangement for producing a phase error signal representing the phase error between a received phase-modulated signal and a locally generated carrier signal. The arrangement comprises two exclusive-OR gates (4) and (5) to which the received signal q(t) and sine and cosine versions s(t) and c(t) of the carrier signal are applied. The outputs of the two gates (4) and (5) control according to their level (high or low), the up/down counts of respective up/down counters (6) and (7). These counts are latched periodically by latches (9) and (10) and the latched values are modified in 2's complementers (11) and (12) and then summed in a binary adder (13) to produce a resultant phase error signal (z).

Abstract: A waveform converter circuit for producing an output square waveform, having a unity mark/space ratio, from an input sinusoidal waveform which can have a large peak-to-peak amplitude range and a large d.c. voltage level range. The circuit comprises a differential amplifier which receives the input waveform at the inverting input. The output of the amplifier is applied to a D-type flip-flop. The flip-flop Q-output is fed via a switched-capacitor filter to the inverting input to provide a corrected d.c. voltage level for the input waveform at this input. The flip-flop Q-output is fed via a switched-capacitor filter to the non-inverting input to provide a slicing level at this input. When the output square waveform has a 1 to 1 mark/space ratio, the corrected d.c. voltage level equals the slicing level. Thus, the circuit will respond to an input waveform with a small peak-to-peak amplitude in the presence of an initial large d.c. voltage level of the input waveform.

Abstract: An RC active filter device which is implemented with integrated circuit technology. Each RC filter element of the device has a distributed series resistance and a distributed shunt capacitance. The series resistance is formed by a strip of resistive material which overlies a resistive plate (or substrate) with an intervening insulating layer to form the shunt capacitance. The filter device can be designed to have a pass-band ripple response which is not affected by variation in nominal absolute resistance and capacitance values resulting from process spreads. These variations only stretch or compress the filter response along the frequency axis. The filter device comprises three RC filter elements and an operational amplifier. The RC filter elements nearest the operational amplifier determine a low pass band, while the input filter element prevents high frequency components outside the low pass band being leaked directly to the filter device output.