Abstract: An integrated device comprises an electrically conductive substrate having an upper surface comprising a recess and a lower surface for contacting the device, a multi-layer stack provided on the upper surface of the substrate and lining the recess, and an electrically conductive layer for contacting the device provided on the multi-layer stack. The multi-layer stack comprises a first, a second, a third and a fourth dielectric layer. Immediately adjacent dielectric layers have different bandgaps to trap charge carriers at respective interfaces between the dielectric layers during operation of the device.

Abstract: A light sensitive semiconductor structure comprises: a substrate; a doped upper region of said substrate having a first type of doping; a first implant region located below and being in direct contact with said doped upper region, said first implant region having a second type of doping so that a pn-junction is located between said doped upper region and said first implant region; and a second implant region located below said first implant region and having said second type of doping, and wherein a peak in a doping profile of said second type of doping is located in said second implant region.