Abstract: A method for forming vias in a semiconductor device improves the resistance and reliability of contacts formed by use of an etch stop layer during the via formation process. An etch stop layer (40), preferably a silicon nitride or aluminum nitride layer, is deposited over conductive interconnect (34). A via (44) is etched in interlayer dielectric (42), stopping on etch stop layer (40). Etch stop layer (40) is then anisotropicly etched to expose the top of conductive interconnect (34), while maintaining a portion of the etch stop layer along a sidewall of the interconnect, and particularly along those sidewall portions which contain aluminum. A conductive plug (54) is then formed in the via, preferably using one or more barrier or glue layers (50). Formation of a tungsten plug using tungsten hexafluoride can then be performed without unwanted reactions between the tungsten source gas and the aluminum interconnect.

Abstract: A process for fabricating a metallized interconnect structure in a semiconductor device includes the steps of depositing a first aluminum layer (22) into a via opening (16) in a dielectric layer (18). A doping layer (24) is deposited by high density plasma sputtering to form a portion thereof in the bottom of the via opening (16). A second aluminum layer (26) is chemical vapor deposited to overlie the doping layer (24) and to fill the via opening (16). An annealing process can then be carried out to diffuse metal dopants from the doping layer (24) into nearby metal regions to provide a uniformly doped metal region within the via opening (16).

Abstract: A contact for a semiconductor device has a via extending through a dielectric and collimated titanium in the via. Depositing titanium by collimation places sufficient metal into high aspect ratio contacts to make good electrical connection. The collimated titanium may be reacted in a nitrogen containing ambient to form a titanium silicide layer at the bottom of the contact and a titanium nitride layer over the titanium silicide layer. The titanium silicide layer provides good electrical contact to a device in a silicon semiconductor substrate and lowers contact resistance. Tungsten may be deposited over the colliminated titanium to form a conductor layer. The titanium nitride layer provides a sticking layer for the tungsten. The contact structure and the method are useful in high aspect ratio contacts present in VLSI multilevel interconnected devices such as dynamic random access memories.

Abstract: A process for selectively depositing a contacting material (20) in trenches (18) for a via or contact which selectively eliminates potential metal contaminants (22) by removing a sacrificial layer (16) after the material (20) is selectively deposited. Initially, the trenches (18) are formed by selectively exposing the substrate (10) to an etchant (19). After metal material (20) is deposited into the formed trenches (18), a chemical etchant (24) is used to remove the sacrificial layer (16) and any formed contaminants (22).

Abstract: The sheet resistance of an integrated circuit wafer (W) may be measured during an integrated circuit fabrication process step. A chamber (26) has disposed therein a plurality of probes (40) each having a conductive tip (84) for abutting the work surface at a respective preselected location thereon. A current source (52, 114) is connected by at least two conductors (118, 112) between at least two of the tips (110, 116). A voltmeter (50) is connected between at least two of the tips (120, 126) by further conductors (122, 124). The voltmeter (50) is read out while the process step is being performed, and the voltage is converted to a sheet resistance according to the preselected electrical configuration of the circuit and a predetermined formula.