Patents by Inventor Roderick McLachlan
Roderick McLachlan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250070793Abstract: There is provided a method for controlling a digital-to-analog converter, DAC. The DAC receives a digital input comprising a plurality of bits including a first segment comprising X most significant bits, MSBs, and a second segment comprising Y least significant bits, LSBs. The DAC modifies the connection of a plurality of current sources, changing the current source coupling between LSB and MSB transconductance stages. By doing this, the monotonicity of the system can be improved in a compact DAC.Type: ApplicationFiled: May 30, 2024Publication date: February 27, 2025Inventors: Roderick MCLACHLAN, Ken Bryan FABAY, Sharad VIJAYKUMAR
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Patent number: 11050419Abstract: Described are various techniques that can minimize the use of high-voltage devices in a unity-gain buffer that can be used in a high voltage application, while providing a circuit that generates an output that is an accurately buffered version of the input.Type: GrantFiled: December 22, 2016Date of Patent: June 29, 2021Assignee: Analog Devices International Unlimited CompanyInventors: Roderick McLachlan, Fergus Downey
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Patent number: 10211788Abstract: A converter circuit is provided that includes an amplifier circuit and further includes: a summing current resistor that exhibits nonlinear resistance coupled between a voltage node and a summing current node of the amplifier; a compensation resistor circuit includes resistors that exhibit nonlinear resistance; the compensation resistor circuit produces a compensation current at the summing current node that compensates for nonlinear current flow in the summing current resistor.Type: GrantFiled: February 28, 2017Date of Patent: February 19, 2019Assignee: Analog Devices GlobalInventors: Roderick McLachlan, Roberto Sergio Matteo Maurino
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Publication number: 20180248527Abstract: A converter circuit is provided that includes an amplifier circuit and further includes: a summing current resistor that exhibits nonlinear resistance coupled between a voltage node and a summing current node of the amplifier; a compensation resistor circuit includes resistors that exhibit nonlinear resistance; the compensation resistor circuit produces a compensation current at the summing current node that compensates for nonlinear current flow in the summing current resistor.Type: ApplicationFiled: February 28, 2017Publication date: August 30, 2018Inventors: Roderick McLachlan, Roberto Sergio Matteo Maurino
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Publication number: 20180183436Abstract: Described are various techniques that can minimize the use of high-voltage devices in a unity-gain buffer that can be used in a high voltage application, while providing a circuit that generates an output that is an accurately buffered version of the input.Type: ApplicationFiled: December 22, 2016Publication date: June 28, 2018Inventors: Roderick McLachlan, Fergus Downey
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Patent number: 9136866Abstract: A digital-to-analog converter (DAC) comprising a first section having a first plurality of current flow paths forming binary weighted values in the DAC; and a second section connected to the first section and having a second plurality of current flow paths, wherein each of the first and second plurality of current flow paths are switchable between first and second nodes, and wherein weights of one or more of the second plurality of current flow paths are notionally equal to weights of one or more of the first plurality of current flow paths so as to provide redundancy in the first section.Type: GrantFiled: October 9, 2013Date of Patent: September 15, 2015Assignee: ANALOG DEVICES GLOBALInventors: Fergus John Downey, Roderick McLachlan
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Publication number: 20150097712Abstract: A digital-to-analog converter (DAC) comprising a first section having a first plurality of current flow paths forming binary weighted values in the DAC; and a second section connected to the first section and having a second plurality of current flow paths, wherein each of the first and second plurality of current flow paths are switchable between first and second nodes, and wherein weights of one or more of the second plurality of current flow paths are notionally equal to weights of one or more of the first plurality of current flow paths so as to provide redundancy in the first section.Type: ApplicationFiled: October 9, 2013Publication date: April 9, 2015Applicant: Analog Devices TechnologyInventors: Fergus John DOWNEY, Roderick McLACHLAN
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Patent number: 8988259Abstract: A data converter can include a resistor network, a switch network connected to the resistor network and having a plurality of switch circuits, each with an NMOS and a PMOS switch transistor, and a voltage generator to generate a drive voltage for driving a gate of at least one of the NMOS or PMOS switch transistors of at least one of the switch circuits. The voltage generator can include first and second pairs of transistors, each pair having connected control terminals and being connected to a second NMOS or PMOS transistor, a first or second resistor, and the other pair of transistors. The first and second resistors can have substantially equal resistance values. A ratio of width-to-length ratios of the second NMOS to PMOS transistors can be substantially equal to such a ratio of the switch circuit NMOS to PMOS transistors.Type: GrantFiled: February 19, 2013Date of Patent: March 24, 2015Assignee: Analog Devices GlobalInventors: Avinash Gutta, Alan Gillespie, Roderick McLachlan
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Publication number: 20140232580Abstract: A data converter can include a resistor network, a switch network connected to the resistor network and having a plurality of switch circuits, each with an NMOS and a PMOS switch transistor, and a voltage generator to generate a drive voltage for driving a gate of at least one of the NMOS or PMOS switch transistors of at least one of the switch circuits. The voltage generator can include first and second pairs of transistors, each pair having connected control terminals and being connected to a second NMOS or PMOS transistor, a first or second resistor, and the other pair of transistors. The first and second resistors can have substantially equal resistance values. A ratio of width-to-length ratios of the second NMOS to PMOS transistors can be substantially equal to such a ratio of the switch circuit NMOS to PMOS transistors.Type: ApplicationFiled: February 19, 2013Publication date: August 21, 2014Applicant: Analog Devices TechnologyInventors: Avinash Gutta, Alan Gillespie, Roderick McLachlan
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Patent number: 8537043Abstract: A digital-to-analog converter (DAC) includes a resistor leg that is switchably connected to a first voltage reference via an n-channel MOSFET and to a second voltage reference via a p-channel MOSFET, and a generator circuit. The generator circuit further includes a first sub-circuit for generating a drive voltage (Vgn) and a second sub-circuit for a) offsetting the first drive voltage by an offset voltage to generate a second drive voltage, and b) supplying the second drive voltage to a gate of one of the first NMOS and the first PMOS.Type: GrantFiled: April 12, 2012Date of Patent: September 17, 2013Assignee: Analog Devices, Inc.Inventors: Roderick McLachlan, Avinash Gutta, Fergus Downey
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Patent number: 8514112Abstract: The invention provides a systematic error correction network coupled to a converter. The converter may display a systematic non-linearity error, and the systematic error correction network shapes a correction transform function that acts like counter distortion function for the non-linearity error. The systematic error correction network then scales the correction transform function according to a reference variable, where the magnitude of non-linearity error is related to the reference variable. The scaled correction transform function is then applied to the converter path in order to generate a corrected analog output signal.Type: GrantFiled: June 24, 2011Date of Patent: August 20, 2013Assignee: Analog Devices, Inc.Inventors: Roderick McLachlan, Michael Coln
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Patent number: 8154433Abstract: A force/sense voltage-mode DAC coupled with multiple transconductance amplifiers that generate a correction current injected to a node in one of the DAC cells is discussed. The correction current injected into the DAC cell may reduce nonlinearity produced by biasing current to the operational amplifiers in the DAC.Type: GrantFiled: October 7, 2010Date of Patent: April 10, 2012Assignee: Analog Devices, Inc.Inventors: Roderick McLachlan, Teng-Hee Lee
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Publication number: 20120050080Abstract: A force/sense voltage-mode DAC coupled with multiple transconductance amplifiers that generate a correction current injected to a node in one of the DAC cells is discussed. The correction current injected into the DAC cell may reduce nonlinearity produced by biasing current to the operational amplifiers in the DAC.Type: ApplicationFiled: October 7, 2010Publication date: March 1, 2012Applicant: ANALOG DEVICES, INC.Inventors: Roderick MCLACHLAN, Teng-Hee LEE
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Publication number: 20120050084Abstract: A digital to analog converter (DAC) includes a pair of operational amplifiers each having a first input coupled to a reference voltage. The DAC includes a plurality of switch-controlled cells, each of which includes a resistor and two force/sense switch pairs. A first force switch may be coupled to an output of a first operational amplifier and an associated sense switch may be coupled to an inverting input of the first operational amplifier. A second force switch may be coupled to an output of a second operational amplifier and an associated sense switch may be coupled to an inverting input of the second operational amplifier. The force switches may provide selectively conductive paths to permit either operational amplifier to drive a given cell.Type: ApplicationFiled: January 12, 2011Publication date: March 1, 2012Applicant: ANALOG DEVICES, INC.Inventor: Roderick McLachlan
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Publication number: 20120013492Abstract: The invention provides a systematic error correction network coupled to a converter. The converter may display a systematic non-linearity error, and the systematic error correction network shapes a correction transform function that acts like counter distortion function for the non-linearity error. The systematic error correction network then scales the correction transform function according to a reference variable, where the magnitude of non-linearity error is related to the reference variable. The scaled correction transform function is then applied to the converter path in order to generate a corrected analog output signal.Type: ApplicationFiled: June 24, 2011Publication date: January 19, 2012Applicant: ANALOG DEVICES, INC.Inventors: Roderick MCLACHLAN, Michael COLN
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Patent number: 8089380Abstract: The invention is a novel scheme of calibrating a voltage-mode digital to analog converter using a current-mode digital to analog converter. A DAC system is comprised of a voltage-mode DAC with an R-2R architecture structure and includes a ROM lookup table where calibration codes associated with each of a plurality of input codes are stored. A reference current is scaled with the calibration codes to output a calibration current that induces adjustments in an output voltage to counteract non-linearities that may be induced by resistor mismatch.Type: GrantFiled: October 22, 2009Date of Patent: January 3, 2012Assignee: Analog Devices, Inc.Inventors: Roderick McLachlan, Samuel Blackburn
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Publication number: 20110037630Abstract: The invention is a novel scheme of calibrating a voltage-mode digital to analog converter using a current-mode digital to analog converter. A DAC system is comprised of a voltage-mode DAC with an R-2R architecture structure and includes a ROM lookup table where calibration codes associated with each of a plurality of input codes are stored. A reference current is scaled with the calibration codes to output a calibration current that induces adjustments in an output voltage to counteract non-linearities that may be induced by resistor mismatch.Type: ApplicationFiled: October 22, 2009Publication date: February 17, 2011Applicant: ANALOG DEVICES, INC.Inventors: Roderick McLACHLAN, Samuel BLACKBURN
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Patent number: 7884747Abstract: A digital to analog converter (DAC) includes a pair of operational amplifiers each having a first input coupled to a respective high or low reference voltage. The DAC includes a plurality of switch-controlled cells, each of which includes a resistor and two force/sense switch pairs. Within each cell, all four switches are coupled to the resistor. A first force switch is coupled to an output of a first op amp and an associated sense switch is coupled to an inverting input of the first op amp. A second force switch is coupled to an output of a second op amp and an associated sense switch is coupled to an inverting input of the second op amp. Thus, the force switches provide selectively conductive paths to permit either op amp to drive a given cell.Type: GrantFiled: June 12, 2009Date of Patent: February 8, 2011Assignee: Analog Devices, Inc.Inventor: Roderick McLachlan
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Publication number: 20100315277Abstract: A digital to analog converter (DAC) includes a pair of operational amplifiers each having a first input coupled to a respective high or low reference voltage. The DAC includes a plurality of switch-controlled cells, each of which includes a resistor and two force/sense switch pairs. Within each cell, all four switches are coupled to the resistor. A first force switch is coupled to an output of a first op amp and an associated sense switch is coupled to an inverting input of the first op amp. A second force switch is coupled to an output of a second op amp and an associated sense switch is coupled to an inverting input of the second op amp. Thus, the force switches provide selectively conductive paths to permit either op amp to drive a given cell.Type: ApplicationFiled: June 12, 2009Publication date: December 16, 2010Applicant: ANALOG DEVICES, INC.Inventor: Roderick MCLACHLAN
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Publication number: 20070096965Abstract: A digital to analog converter comprising: a digital to analog conversion core adapted to receive at least one reference voltage and a digital word to be converted, and to output an analog voltage as a function of the digital word and the at least one reference voltage; a sensing circuit for sensing a difference between a first ground voltage associated with an output of the digital to analog converter and a ground reference voltage occurring at the digital to analog converter; and a compensation circuit for applying a compensation voltage to the at least one reference voltage used by the conversion core of the digital to analog converter.Type: ApplicationFiled: November 3, 2005Publication date: May 3, 2007Inventors: Alan Gillespie, Roderick McLachlan, Teng-Hee Lee