Patents by Inventor Rodney Chandler
Rodney Chandler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180278408Abstract: A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.Type: ApplicationFiled: May 29, 2018Publication date: September 27, 2018Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Patent number: 9985777Abstract: A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.Type: GrantFiled: January 30, 2017Date of Patent: May 29, 2018Assignee: MAXLINEAR, INC.Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Publication number: 20170272234Abstract: A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.Type: ApplicationFiled: January 30, 2017Publication date: September 21, 2017Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Patent number: 9559835Abstract: A signal receiver may comprise circuitry for applying multi-level sampling to an input signal, using a plurality of sampling rates that comprises at least two different sampling rates, and circuitry for processing one or more outputs of the multi-level sampling. The processing may comprises sampling at a sampling rate that is different than each of the plurality of sampling rates used during the multi-level sampling and applying analog-to-digital conversion. At least one of the sampling rates used during the multi-level sampling and/or the sampling rate used during the processing may be set based on configuring of one or more clock signals used during the multi-level sampling and/or during the processing. At least one of the one or more clock signals may be configured based on reduction of frequency of a corresponding base clock signal.Type: GrantFiled: December 8, 2014Date of Patent: January 31, 2017Assignee: MAXLINEAR, INC.Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Publication number: 20150092899Abstract: A signal receiver may comprise circuitry for applying multi-level sampling to an input signal, using a plurality of sampling rates that comprises at least two different sampling rates, and circuitry for processing one or more outputs of the multi-level sampling. The processing may comprises sampling at a sampling rate that is different than each of the plurality of sampling rates used during the multi-level sampling and applying analog-to-digital conversion. At least one of the sampling rates used during the multi-level sampling and/or the sampling rate used during the processing may be set based on configuring of one or more clock signals used during the multi-level sampling and/or during the processing. At least one of the one or more clock signals may be configured based on reduction of frequency of a corresponding base clock signal.Type: ApplicationFiled: December 8, 2014Publication date: April 2, 2015Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Patent number: 8934590Abstract: A signal receiver may comprise a first sampling circuitry that is operable to sample in a first level at a particular main sampling rate; a second sampling circuitry that is operable to sample in a second level, an output of the first sampling circuitry, at a second sampling rate that is reduced compared to the main sampling rate; a third sampling circuitry that is operable to sample in a third level, one or more outputs of the second sampling circuitry, at a third sampling rate that is reduced compared to the second sampling rate; and an analog-to-digital conversion (ADC) circuitry for applying analog-to-digital conversion to one or more outputs of the third sampling circuitry.Type: GrantFiled: December 16, 2013Date of Patent: January 13, 2015Assignee: MaxLinear, Inc.Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Publication number: 20140105339Abstract: A signal receiver may comprise a first sampling circuitry that is operable to sample in a first level at a particular main sampling rate; a second sampling circuitry that is operable to sample in a second level, an output of the first sampling circuitry, at a second sampling rate that is reduced compared to the main sampling rate; a third sampling circuitry that is operable to sample in a third level, one or more outputs of the second sampling circuitry, at a third sampling rate that is reduced compared to the second sampling rate; and an analog-to-digital conversion (ADC) circuitry for applying analog-to-digital conversion to one or more outputs of the third sampling circuitry.Type: ApplicationFiled: December 16, 2013Publication date: April 17, 2014Applicant: MaxLinear, Inc.Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Patent number: 8611483Abstract: A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.Type: GrantFiled: May 31, 2012Date of Patent: December 17, 2013Assignee: MaxLinear, Inc.Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman
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Publication number: 20120309337Abstract: A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.Type: ApplicationFiled: May 31, 2012Publication date: December 6, 2012Inventors: Jianyu Zhu, Sheng-Yu Peng, Rodney Chandler, Pawan Tiwari, Rahul Bhatia, Eric Fogleman