Patents by Inventor Rodney Clair Tesch

Rodney Clair Tesch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Galois field arithmetic logic unit circuit
    Patent number: 6003057
    Abstract: A Galois Field arithmetic logic unit (GF ALU) circuit (200) that generates a GF product of size M includes a first and a second input field element register (205, 210), a result field element register (215), a plurality, I, of subfield sets of logic gates (255, 260, 265), a plurality, S, of extension sets of logic gates (270, 275), and 3M switches (135). M is equal to S multiplied by I. A Galois Field of size M, S, and I each has an optimal normal basis. The first and second input field element registers (205, 210) are alternately coupled to the result field element register (215) by the I subfield sets of logic gates (255, 260, 265) in a first configuration and by the S extension sets of logic gates (270, 275) in a second configuration. The 3M switches (135) alternate the first and second configurations.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: December 14, 1999
    Assignee: Motorola, Inc.
    Inventors: James Douglas Dworkin, Michael John Torla, Rodney Clair Tesch, Scott Vanstone