Abstract: A decoder and comparator for Manchester biphase code utilizes a clock recovery logic to recover clock signals directly from the code and thus bypasses the necessity of an external clock. This recovered clock is utilized to input the code into shift registers. Further, a frame sync recovery logic analyzes the code with respect to correspondence of a proper Manchester code format. An encoder is utilized to encode first and second comparators. The first comparator is encoded with error codes for the Manchester code. If the proper Manchester code is present as determined by the frame sync recovery logic and the proper error codes are present, a frame or word of code is output from the shift registers to a first holding latch. If proper Manchester code is present and if a second set of error perameters are met as for instance perameters with respect to either data or address, the frame or word held in the first latch is output to a second latch and from there to an output bus for use by some other device.