Abstract: A memory stick configured for use with a processor in a computer is provided. The memory stick includes a printed circuit board with first and second sides, each of the first and second sides including eighteen memory chips, each of the memory chips being an ×8 DRAM chip; the eighteen memory chips being distributed into first, second, third and fourth rows, the first row and the second row being on a left half of the printed circuit board and the third and fourth row being on a right half of the printed circuit board; and the printed circuit board including at least 400 pins including at least 16 pins for ECC bits and at least 128 pins for data bits; wherein at least the memory chips and the 128 pins for data bits establish a 128-bit data width to communicate.

Abstract: A system and method for managing the allocation of Time Division Multiplexing (TDM) timeslots in a network switch. The network switch may use a TDM cycle comprising multiple timeslots to manage shared resources and to schedule data ingress and egress through the ports of the current configuration, wherein each port is assigned one or more timeslots. The network switch may be reprogrammed to support one of multiple timeslot assignment schemes for one of multiple port configurations. The network switch may support configurations with varying numbers of ports, e.g. 8- and 16-port configurations. A network switch may also support configurations where two or more ports are combined to form one port, for example, a 2 Gbs Fibre Channel port. To meet the requirements of the various configurations, the timeslot assignment scheme may be reprogrammed to meet the scheduling requirements of each of the possible port configurations.

Abstract: A method and apparatus for transferring data between IP devices (including, but not limited to, Gigabit Ethernet devices) and SCSI or Fibre Channel devices. The device interfaces may be either SCSI, Fibre Channel or IP interfaces such as Gigabit Ethernet. Data is switched between SCSI and IP, Fibre Channel and IP, or between SCSI and Fibre Channel. Data can also be switched from SCSI to SCSI, IP to IP and FC to FC. The port interfaces provide the conversion from the input frame format to an internal frame format, which can be routed within the apparatus. The amount of processing performed by each port interface is dependent on the interface type. The processing capabilities of the present invention permit rapid transfer of information packets between multiple interfaces at latency levels meeting the stringent requirements for storage protocols.