Abstract: A mobile, free standing field sport shooting target device, including a pole having a first end and a second end, wherein an opening is located at the first and second ends of the pole, a counter weight plate having a plurality of openings, wherein the counter weight plate is located adjacent to the first end of the pole, and a collar operatively connected to the first end of the pole, wherein the collar has a first end and a second end such that the counter weight plate is located adjacent to the first end of the collar and the collar is used to retain the counter weight on the first end of the pole, and wherein a distance between the first end of the pole and the second end of the collar can be adjusted.

Abstract: A mobile, free standing field sport shooting target device, including a pole having a first end and a second end, wherein an opening is located at the first and second ends of the pole, a counter weight plate having a plurality of openings, wherein the counter weight plate is located adjacent to the first end of the pole, and a collar operatively connected to the first end of the pole, wherein the collar has a first end and a second end such that the counter weight plate is located adjacent to the first end of the collar and the collar is used to retain the counter weight on the first end of the pole, and wherein a distance between the first end of the pole and the second end of the collar can be adjusted.

Abstract: A system for characterizing a slurry in a slurry process includes a flow tube, a camera, and a computer. The system is suitable for use with an oil sands extraction slurry processed or treated by an oil sands extraction slurry process. The slurry is diverted from the slurry process into the flow tube. The camera images the slurry as it flows through a transparent portion of the flow tube to produce a digital image of the slurry. The computer analyzes the digital image to determine a slurry characteristic. Based on the determined slurry characteristic, the computer may predict a performance metric of the slurry process and adjust an operating parameter of the slurry process to optimize the slurry process towards a target performance metric. Multiple systems may be used to continuously monitor slurry characteristics at upstream and downstream steps of the slurry process, and determine correlations between those characteristics.

Abstract: A system for characterizing a slurry in a slurry process includes a flow tube, a camera, and a computer. The system is suitable for use with an oil sands extraction slurry processed or treated by an oil sands extraction slurry process. The slurry is diverted from the slurry process into the flow tube. The camera images the slurry as it flows through a transparent portion of the flow tube to produce a digital image of the slurry. The computer analyzes the digital image to determine a slurry characteristic. Based on the determined slurry characteristic, the computer may predict a performance metric of the slurry process and adjust an operating parameter of the slurry process to optimize the slurry process towards a target performance metric. Multiple systems may be used to continuously monitor slurry characteristics at upstream and downstream steps of the slurry process, and determine correlations between those characteristics.

Abstract: In one general aspect, an apparatus can include a trench disposed in a semiconductor region, a shield dielectric layer lining a lower portion of a sidewall of the trench and a bottom surface of the trench, and a gate dielectric lining a upper portion of the sidewall of the trench. The apparatus can also include a shield electrode disposed in a lower portion of the trench and insulated from the semiconductor region by the shield dielectric layer, and an inter-electrode dielectric (IED) disposed in the trench over the shield electrode where the shield electrode has a curved top surface.

Abstract: A method for forming a field effect transistor includes forming a trench in a semiconductor region and forming a dielectric layer lining lower sidewalls and bottom surface of the trench. After forming the dielectric layer, a lower portion of the trench is filled with a shield electrode. An inter-electrode dielectric (IED) is formed in the trench over the shield electrode by carrying out a steam ambient oxidation and carrying out a dry ambient oxidation. A gate electrode is formed in an upper portion of the trench. The gate electrode may be insulated from the shield electrode by the IED.

Abstract: A trench is formed in a semiconductor region. A dielectric layer lining sidewalls and bottom surface of the trench is formed. The dielectric layer is thicker along lower sidewalls and the bottom surface than along upper sidewalls of the trench. After forming the dielectric layer, a lower portion of the trench is filled with a shield electrode. Dielectric spacers are formed along the upper trench sidewalls. After forming the dielectric spacers, an inter-electrode dielectric (IED) is formed in the trench over the shield electrode. After forming the IED, the dielectric spacers are removed.

Abstract: A trench is formed in a semiconductor region. A dielectric layer lining sidewalls and bottom surface of the trench is formed. The dielectric layer is thicker along lower sidewalls and the bottom surface than along upper sidewalls of the trench. After forming the dielectric layer, a lower portion of the trench is filled with a shield electrode. Dielectric spacers are formed along the upper trench sidewalls. After forming the dielectric spacers, an inter-electrode dielectric (IED) is formed in the trench over the shield electrode. After forming the IED, the dielectric spacers are removed.

Abstract: A field effect transistor is formed as follows. A trench is formed in a semiconductor region. A dielectric layer lining the trench sidewalls and bottom is formed. The trench is filled with a conductive material. The conductive material is recessed into the trench to thereby form a shield electrode in a bottom portion of the trench. The recessing of the conductive material includes isotropic etching of the conductive material. An inter-electrode dielectric (IED) is formed over the recessed shield electrode.

Abstract: The invention provides a real-time method and computer-implemented system of monitoring animal health comprising sensing at least one physical characteristic by means of an active physical sensor attached to the animal, and sensing at least one activity of the animal by means of an activity sensor attached to the animal; positioning an active activity signal generator in the environment, such that the activity signal generator is associated with an activity, gathering physical characteristic data and activity data, and wirelessly transmitting all such data to a network receiver/converter, in real-time; converting all such data if necessary, and transmitting all such data over a computer network to one or more users, in real-time.

Abstract: A trench-gated field effect transistor (FET) is formed as follows. Using one mask, a plurality of active gate trenches and at least one gate runner trench are defined and simultaneously formed in a silicon region such that (i) the at least one gate runner trench has a width greater than a width of each of the plurality of active gate trenches, and (ii) the plurality of active gate trenches are contiguous with the at least one gate runner trench.

Abstract: A field effect transistor is formed as follows. Trenches are formed in a semiconductor region of a first conductivity type. Each trench is partially filled with one or more materials. A dual-pass angled implant is carried out to implant dopants of a second conductivity type into the semiconductor region through an upper surface of the semiconductor region and through upper trench sidewalls not covered by the one or more material. A high temperature process is carried out to drive the implanted dopants deeper into the mesa region thereby forming body regions of the second conductivity type between adjacent trenches. Source regions of the first conductivity type are then formed in each body region.

Abstract: A field effect transistor is formed as follows. A trench is formed in a semiconductor region. A dielectric layer lining the trench sidewalls and bottom is formed. The trench is filled with a conductive material. The conductive material is recessed into the trench to thereby form a shield electrode in a bottom portion of the trench. The recessing of the conductive material includes isotropic etching of the conductive material. An inter-electrode dielectric (IED) is formed over the recessed shield electrode.

Abstract: A field effect transistor includes a body region of a first conductivity type over a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminates within the semiconductor region. At least one conductive shield electrode is disposed in the gate trench. A gate electrode is disposed in the gate trench over but insulated from the at least one conductive shield electrode. A shield dielectric layer insulates the at lease one conductive shield electrode from the semiconductor region. A gate dielectric layer insulates the gate electrode from the body region. The shield dielectric layer is formed such that it flares out and extends directly under the body region.

Abstract: Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented.

Abstract: Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented.

Abstract: Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented.