Patents by Inventor Rodney Robison

Rodney Robison has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11383211
    Abstract: A method and a system are described for mixing liquid chemicals at dynamically changing or static ratios during a given dispense, with extremely high uniformity and repeatability. A mixer includes multiple fluid supply lines including elongate bladders defining a linear flow path and being configured to laterally expand to collect a process fluid and laterally contract to deliver a selected volume of the process fluid to the mixer.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: July 12, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Ronald W. Nasman, Lior Huli, Anton deVilliers, Rodney Robison, Norman Jacobson, James Grootegoed
  • Publication number: 20200338510
    Abstract: A method and a system are described for mixing liquid chemicals at dynamically changing or static ratios during a given dispense, with extremely high uniformity and repeatability. A mixer includes multiple fluid supply lines including elongate bladders defining a linear flow path and being configured to laterally expand to collect a process fluid and laterally contract to deliver a selected volume of the process fluid to the mixer.
    Type: Application
    Filed: September 4, 2019
    Publication date: October 29, 2020
    Applicant: Tokyo Electron Limited
    Inventors: Ronald W. NASMAN, Lior Huli, Anton DeVilliers, Rodney Robison, Norman Jacobson, James Grootegoed
  • Publication number: 20070131544
    Abstract: Enhanced reliability and performance stability of a deposition baffle is provided in ionized physical vapor deposition (iPVD) processing tool in which a high density plasma is coupled into a chamber from an external antenna through a dielectric window. A deposition baffle with slots protects the window. The deposition baffle has slots through it. The width of the slots at the window side of the baffle is different from the width of the slots at the plasma side of the baffle. Preferably, the ratio of width of the slots at the window side is preferably less than the width at the plasma side. The slots have sidewalls at the plasma side that are arc spray coated. The ratio of the baffle thickness to slot width, or the slot's aspect ratio, is less than 8:1, and preferably less than 6:1. The deposition baffle is spaced less than 1 mm from the window, and preferably less than 0.5 mm from the window.
    Type: Application
    Filed: December 14, 2005
    Publication date: June 14, 2007
    Inventors: Jozef Brcka, Rodney Robison
  • Publication number: 20050211545
    Abstract: An iPVD system is programmed to deposit uniform material, such as barrier material, into high aspect ratio nano-size features on semiconductor substrates using a process which enhances the sidewall coverage compared to the field and bottom coverage(s) while minimizing or eliminating overhang within a vacuum chamber. The iPVD system is operated at low target power and high pressure >50 mT to sputter material from the target. RF energy is coupled into the chamber to form a high density plasma. A small RF bias (less than a few volts) can be applied to aid in enhancing the coverage, especially at the bottom.
    Type: Application
    Filed: March 26, 2004
    Publication date: September 29, 2005
    Inventors: Frank Cerio, Jacques Faguet, Bruce Gittleman, Rodney Robison
  • Publication number: 20050103445
    Abstract: An inductively coupled plasma source is provided with a peripheral ionization source for producing a high-density plasma in a vacuum chamber for semiconductor wafer coating or etching. The source includes a segmented configuration having high and low radiation segments and produces a generally ring-shaped array of energy concentrations in the plasma around the periphery of the chamber. Energy is coupled from a segmented low inductance antenna through a dielectric window or array of windows and through a segmented shield or baffle.
    Type: Application
    Filed: November 19, 2003
    Publication date: May 19, 2005
    Inventors: Jozef Brcka, Rodney Robison
  • Patent number: 6755945
    Abstract: An iPVD apparatus (20) is programmed to deposit material (10) into high aspect ratio submicron features (11) on semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). The modes operate at different power and pressure parameters. Pressure of more than 50 mTorr, for example, is used for sputtering material from a target while pressure of less than a few mTorr, for example, is used to etch. Bias power on the substrate is an order of magnitude higher for etching, producing several hundred volt bias for etching, but only a few tens of volts for deposition. The alternating etching modes remove deposited material that overhangs edges of features on the substrate, removes some of the deposited material from the bottoms (15) of the features, and resputters the removed deposited material onto sidewalls (16) of the features. The substrate (21) is cooled during deposition and etching, and particularly during etching to substantially below 0° C.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: June 29, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Tugrul Yasar, Glyn Reynolds, Frank Cerio, Bruce Gittleman, Michael Grapperhaus, Rodney Robison
  • Publication number: 20030034244
    Abstract: An iPVD apparatus (20) is programmed to deposit material (10) into high aspect ratio submicron features (11) on semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). The modes operate at different power and pressure parameters. Pressure of more than 50 mTorr, for example, is used for sputtering material from a target while pressure of less than a few mTorr, for example, is used to etch. Bias power on the substrate is an order of magnitude higher for etching, producing several hundred volt bias for etching, but only a few tens of volts for deposition. The alternating etching modes remove deposited material that overhangs edges of features on the substrate, removes some of the deposited material from the bottoms (15) of the features, and resputters the removed deposited material onto sidewalls (16) of the features. The substrate (21) is cooled during deposition and etching, and particularly during etching to substantially below 0° C.
    Type: Application
    Filed: May 3, 2002
    Publication date: February 20, 2003
    Inventors: Tugrul Yasar, Glyn Reynolds, Frank Cerio, Bruce Gittleman, Michael Grapperhaus, Rodney Robison