Patents by Inventor Rodolfo L. Gacusan

Rodolfo L. Gacusan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7009300
    Abstract: A stacked multi-chip package includes first chip with conductive pads on both front and back sides. The front side may include a polymer layer with interconnect. A first polymer layer formed on the backside of the first chip has a cutout to receive a second chip. The first and second chip may be joined as a flip chip. A second polymer layer formed on the first polymer layer has a cutout to receive a third chip. A third polymer layer formed on the second polymer layer contains interconnect to interconnect the first, second and third chips, including the backside of the first chip. Conductive bumps on the front side of the first chip and on the polymer layers provide external I/O connection.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: March 7, 2006
    Assignee: Intel Corporation
    Inventor: Rodolfo L. Gacusan
  • Patent number: 6696320
    Abstract: A stacked multi-chip package includes first chip with conductive pads on both front and back sides. The front side may include a polymer layer with interconnect. A first polymer layer formed on the backside of the first chip has a cutout to receive a second chip. The first and second chip may be joined as a flip chip. A second polymer layer formed on the first polymer layer has a cutout to receive a third chip. A third polymer layer formed on the second polymer layer contains interconnect to interconnect the first, second and third chips, including the backside of the first chip. Conductive bumps on the front side of the first chip and on the polymer layers provide external I/O connection.
    Type: Grant
    Filed: September 30, 2001
    Date of Patent: February 24, 2004
    Assignee: Intel Corporation
    Inventor: Rodolfo L. Gacusan
  • Publication number: 20040012941
    Abstract: A stacked multi-chip package includes first chip with conductive pads on both front and back sides. The front side may include a polymer layer with interconnect. A first polymer layer formed on the backside of the first chip has a cutout to receive a second chip. The first and second chip may be joined as a flip chip. A second polymer layer formed on the first polymer layer has a cutout to receive a third chip. A third polymer layer formed on the second polymer layer contains interconnect to interconnect the first, second and third chips, including the backside of the first chip. Conductive bumps on the front side of the first chip and on the polymer layers provide external I/O connection.
    Type: Application
    Filed: July 15, 2003
    Publication date: January 22, 2004
    Applicant: Intel Corporation
    Inventor: Rodolfo L. Gacusan
  • Publication number: 20030064545
    Abstract: A stacked multi-chip package includes first chip with conductive pads on both front and back sides. The front side may include a polymer layer with interconnect. A first polymer layer formed on the backside of the first chip has a cutout to receive a second chip. The first and second chip may be joined as a flip chip. A second polymer layer formed on the first polymer layer has a cutout to receive a third chip. A third polymer layer formed on the second polymer layer contains interconnect to interconnect the first, second and third chips, including the backside of the first chip. Conductive bumps on the front side of the first chip and on the polymer layers provide external I/O connection.
    Type: Application
    Filed: September 30, 2001
    Publication date: April 3, 2003
    Inventor: Rodolfo L. Gacusan