Patents by Inventor Rodolph Gérard Jacques Ascanio Jean-Denis Perfetta

Rodolph Gérard Jacques Ascanio Jean-Denis Perfetta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8321861
    Abstract: A data processing system 2 executes non-native program instructions using either a first execution environment 14 or a second execution environment 22. The first execution environment identifies at runtime if non-native program instructions to be executed are marked as intended for execution by the second execution environment. When such instructions are encountered the first execution environment triggers performance of data processing operations as specified by the one or more marked program instructions performed by the second execution environment. When those processing operations as specified by the one or more marked program instructions have been completed, a return is made to the first execution environment.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: November 27, 2012
    Assignee: ARM Limited
    Inventors: Peter William Harris, Rodolph Gerard Jacques Ascanio Jean-Denis Perfetta, Peter Brian Wilson
  • Patent number: 8239861
    Abstract: A method of performing a processing task in a data processing apparatus is provided that reduces memory usage of the processing task. According to this method a Virtual Machine performs the steps of accessing platform-neutral program code in a function repository, executing the processing task on the Virtual Machine, and analysing at a current execution point, on a function-by-function basis, which functions in the function repository are inactive functions. The Virtual Machine performs software-based unloading from the function repository of at least a portion of platform-neutral program code corresponding to one or more inactive functions. A corresponding virtual machine and data processing apparatus are also provided.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: August 7, 2012
    Assignee: ARM Limited
    Inventors: Riaan Swart, Rodolph Gérard Jacques Ascanio Jean-Denis Perfetta, David John Butcher
  • Patent number: 7752424
    Abstract: A processor 2 is provided with the ability to execute program instructions in the form of Java bytecodes including a dedicated null checking instruction. The null checking instruction reads the top of stack value, compares this with a null value and jumps to an exception handling routine if the top of stack value equals the null value, otherwise the next program instruction is executed.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: July 6, 2010
    Assignee: ARM Limited
    Inventor: Rodolph Gérard Jacques Ascanio Jean-Denis Perfetta
  • Patent number: 7698534
    Abstract: A method of reordering a sequence of code for processing by a target data processor in order to reduce an execution time for said code on said target data processor is disclosed. The method comprises the steps of: in response to a request to execute said sequence of code, loading said sequence of code into a volatile data store associated with said target data processor; analyzing said sequence of code in relation to properties of said target data processor; identifying interlocks within said sequence of code when executing on said target data processor, in which a portion of code would be stalled while waiting for an earlier portion to complete; reordering said sequence of code to remove at least some of said interlocks; and executing said reordered sequence of code; wherein said steps of analyzing, identifying, reordering and executing are performed by said target data processor.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: April 13, 2010
    Assignee: ARM Limited
    Inventors: Rodolph Gérard Jacques Ascanio Jean-Denis Perfetta, Graham Peter Wilkinson
  • Publication number: 20090210874
    Abstract: A data processing system 2 executes non-native program instructions using either a first execution environment 14 or a second execution environment 22. The first execution environment identifies at runtime if non-native program instructions to be executed are marked as intended for execution by the second execution environment. When such instructions are encountered the first execution environment triggers performance of data processing operations as specified by the one or more marked program instructions performed by the second execution environment. When those processing operations as specified by the one or more marked program instructions have been completed, a return is made to the first execution environment.
    Type: Application
    Filed: February 20, 2008
    Publication date: August 20, 2009
    Inventors: Peter William Harris, Rodolph Gerard Jacques Ascanio Jean-Denis Perfetta, Peter Brian Wilson
  • Publication number: 20090043989
    Abstract: A processor 2 is provided with the ability to execute program instructions in the form of Java bytecodes including a dedicated null checking instruction. The null checking instruction reads the top of stack value, compares this with a null value and jumps to an exception handling routine if the top of stack value equals the null value, otherwise the next program instruction is executed.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 12, 2009
    Applicant: ARM LIMITED
    Inventor: Rodolph Gerard Jacques Ascanio Jean-Denis Perfetta
  • Publication number: 20080201698
    Abstract: A method of reordering a sequence of code for processing by a target data processor in order to reduce an execution time for said code on said target data processor is disclosed. The method comprises the steps of: in response to a request to execute said sequence of code, loading said sequence of code into a volatile data store associated with said target data processor; analyzing said sequence of code in relation to properties of said target data processor; identifying interlocks within said sequence of code when executing on said target data processor, in which a portion of code would be stalled while waiting for an earlier portion to complete; reordering said sequence of code to remove at least some of said interlocks; and executing said reordered sequence of code; wherein said steps of analyzing, identifying, reordering and executing are performed by said target data processor.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 21, 2008
    Inventors: Rodolph Gerard Jacques Ascanio Jean-Denis Perfetta, Graham Peter Wilkinson