Abstract: An apparatus processes an equalizer output signal. The equalizer output signal is formed by transmitting an alternate mark inversion input signal over a channel and passing the transmitted signal through an adaptive equalizer. The apparatus includes a correlator circuit block that detects an incorrect convergence of the adaptive equalizer and outputs a correlator output signal. A corrector filter receives the equalizer output signal and the correlator output signal, and applies a correction to the equalizer output signal based on the correlator output signal, to form a corrected signal that is substantially a time delayed copy of the input signal.

Abstract: Initialization of an adaptive equalizer is controlled by varying a gain applied to an input signal. The input signal may be an alternate mark inversion signal. The gain is applied to the input signal to form an amplified signal. An autocorrelation value of the amplified signal is calculated. The autocorrelation value is compared to a predetermined constant. The gain is adjusted, based on which of the group consisting of the autocorrelation value and the predetermined constant is greater. The gain application, autocorrelation calculation, comparison and gain adjustment are repeated, until the autocorrelation value is sufficiently close to the predetermined constant to satisfy a convergence criterion. The amplified signal is then filtered.

Abstract: Initialization of an adaptive equalizer is controlled by varying a gain applied to an input signal. The input signal may be an alternate mark inversion signal. The gain is applied to the input signal to form an amplified signal. An autocorrelation value of the amplified signal is calculated. The autocorrelation value is compared to a predetermined constant. The gain is adjusted, based on which of the group consisting of the autocorrelation value and the predetermined constant is greater. The gain application, autocorrelation calculation, comparison and gain adjustment are repeated, until the autocorrelation value is sufficiently close to the predetermined constant to satisfy a convergence criterion. The amplified signal is then filtered.

Abstract: An apparatus processes an equalizer output signal. The equalizer output signal is formed by transmitting an alternate mark inversion input signal over a channel and passing the transmitted signal through an adaptive equalizer. The apparatus includes a correlator circuit block that detects an incorrect convergence of the adaptive equalizer and outputs a correlator output signal. A corrector filter receives the equalizer output signal and the correlator output signal, and applies a correction to the equalizer output signal based on the correlator output signal, to form a corrected signal that is substantially a time delayed copy of the input signal.

Abstract: An integrated circuit includes an oscillator circuit for generating an output signal having a desired frequency. The oscillator circuit includes a capacitive device having a controllable capacitance value responsive to a control signal. A control circuit is connected to the oscillator circuit for controlling the capacitance value so that the oscillator circuit generates the output signal at the desired frequency. The control circuit includes a memory for storing a digital control word and a control signal generating circuit for converting the digital control word into the control signal for the capacitive device. Setting the desired frequency of the output signal is performed internal to the integrated circuit without requiring complex control circuitry for switching among various capacitors.

Abstract: A method and electronic circuitry for providing a Digital to Analog converter analog output in Integrated Circuit Digital to Analog Converter applications, said analog output being stable over temperature and supply changes, independent on transistor parameters of a particular chip, and stable for transistor parameter variation from chip to chip. An integrated circuit reference cell is implemented; an internal (secondary) reference quantity determining the analog Digital to Analog Converter (DAC) output is generated; the said internal (secondary) reference quantity for the Digital to Analog converter is referenced to on-chip device specific internal (primary) reference output from the chip in question, and the said chip device specific internal (primary) reference output, is processed further in order to derive a fixed predetermined DAC reference value, that is equal for any chip; and said fixed predetermined DAC reference value is supplied to the digital input of said Digital to Analog converter.