Abstract: In a material sample separation and collection system, a sample is obtained by airflow separation. The system and attendant methods collect a complete sample over a defined period of time by modulating one or more pressure balancing valves, thus allowing for a variable flow rate of materials through the system even while the fan or other source of airflow operates at constant speed. The sampling rate, which is based on how quickly or slowly materials enter and pass through the system and into a collection vessel, is automatically modulated in real time based on sensor data.

Abstract: A clock forwarding scheme for use in a system comprising a plurality of communications links, each link configured to transmit data packets and a forwarded clock from a transmitting device to a receiving device. The required delay in the forwarded clock signal is generated at the transmitting device by adding tuning etch to the signal path for the forwarded clock signal prior to transmission of the forwarded clock signal and data packets. The source device preferably has at least two clock output pins to deliver two synchronous clock signals off the device and at least two clock input pins to receive the clock signals. One of the two clock signals is delayed with respect to the other via a longer conduction path. The delayed clock signal is used to trigger logic to transmit the forwarded clock signal. The undelayed clock signal is used to trigger logic to transmit data bits.

Abstract: A clock forwarding scheme for use in a system comprising a plurality of communications links, each link configured to transmit data packets and a forwarded clock from a transmitting device to a receiving device. The required delay in the forwarded clock signal is generated at the transmitting device by adding tuning etch to the signal path for the forwarded clock signal prior to transmission of the forwarded clock signal and data packets. The source device preferably has at least two clock output pins to deliver two synchronous clock signals off the device and at least two clock input pins to receive the clock signals. One of the two clock signals is delayed with respect to the other via a longer conduction path. The delayed clock signal is used to trigger logic to transmit the forwarded clock signal. The undelayed clock signal is used to trigger logic to transmit data bits.

Abstract: An open drain driver, differential receiver circuit for transmitting logic signals generated by metal oxide semiconductor (MOS) logic circuits over a data bus that uses distributed termination impedances. The distributed termination impedance values are chosen to minimize the data bus settling time both when a driver in a given module drives a signal consisting of alternating logic levels, as well as when two different drivers drive a given logic level in succession. Each open drain driver includes a multiplexor, a flip flop, an inverter stage, and a driver transistor. The multiplexor selects either a data signal to be transmitted or a deasserted data value to be passed to the input of the flip flop. The flip flop also accepts a test input, which sets the flip flop to a known state. As a result, no additional delay is inserted in the critical path between the rising edge of a flip flop clock input signal and the driver output.

Abstract: A seat belt (safety belt) webbing has lateral stiffness, low longitudinal stiffness, abrasion resistance, and user comfort provided by a soft, round edge of the webbing. In a loom, a pick needle is used to move both a monofilament and multifilament yarn together across the full width of the loom shed. A higher tension is applied to the monofilament yarn so that the monofilament yarn does not protrude beyond the edges of the webbing. In the selvedge (marginal) portions of the web a single ply warp yarn is provided, while in the central portion a double ply warp yarn is provided. The selvedge portions may have a reverse twill weave. Two catchcord yarns, a binder thread and a locking thread, are knit at one edge portion of the webbing.