Abstract: An imager having two panels of pixels (i.e., the imager's rows of pixels are split into two panels) that are controllable by separate row decoders. The dual panel architecture allows pipelining of pixel readout and column readout operations to improve the imager's frame rate. The dual panel architecture may use a standard pixel configuration, a shared column and/or a shared row and column configuration.

Abstract: Automatic exposure adjusting device considers the image on a pixel-by-pixel basis. Each pixel is characterized according to its most significant bits. After the pixels are characterized, the number of pixels in any particular group is counted. That counting is compared with thresholds which set whether the image is over exposed, under exposed, and can optionally also determine if the image is seriously over exposed or seriously under exposed. Adjustment of the exposure is carried out to bring the image to a more desired state.

Abstract: An imaging device that stores charge from a photosensor under at least one storage gate. A driver used to operate the at least one storage gate, senses how much charge was transferred to the storage gate. The sensed charge is used to obtain at least one signature of the image scene. The at least one signature may then be used for processing such as e.g., motion detection, auto-exposure, and auto-white balancing.

Abstract: An imaging device having pixels that store charge from a photosensor under at least one storage gate during a sampling period. A driver used to operate the at least one storage gate, senses how much charge was transferred to the storage gate and sets a flag in an analog memory (e.g., stores a voltage in a floating diffusion region) based on the amount of sensed charge. The sensed charge is used to determine an integration time for the pixel.

Abstract: Methods, apparatus and systems may operate to copy pixel charge, compensating for image subject shift within in an imaging array during exposure time of an imaging device. Activities may include transferring charge from one or more source pixels to one or more buffer pixels within the same pixel array, and copying the charge to destination pixels within the same pixel array prior to an end of the image integration time. Charge transfer may include transfer of charge from more than one array on a single die. Additional activities may include transferring charge from one or more source pixels to one or more destination pixels multiple times prior to the end of the image integration time.

Abstract: A CMOS image pixel array formed on a chip is used for storing programmed information within the pixel array. Manufacturing lot and other data is written to the array during manufacturing and testing by applying a laser to pixels to render the photodiode defective. The programmed data is read from the pixel array using existing circuitry.

Abstract: An imager having column-wise clamp voltage drivers. Each clamp voltage driver is substantially identical to the output circuitry of the imager's pixels in that column and is designed to track the noise experienced by the readout pixels. Each clamp voltage driver generates and drives the appropriate clamp voltage to store reset and pixel signals in associated column sample and hold circuitry while suppressing the noise typically experienced during the readout process.

Abstract: An imager having column-wise clamp voltage drivers. Each clamp voltage driver is substantially identical to the output circuitry of the imager's pixels in that column and is designed to track the noise experienced by the readout pixels. Each clamp voltage driver generates and drives the appropriate clamp voltage to store reset and pixel signals in associated column sample and hold circuitry while suppressing the noise typically experienced during the readout process.

Abstract: A CMOS image pixel array formed on a chip is used for storing programmed information within the pixel array. Manufacturing lot and other data is written to the array during manufacturing and testing by applying a laser to pixels to render the photodiode defective. The programmed data is read from the pixel array using existing circuitry.

Abstract: An imaging device having pixels that store charge from a photosensor under at least one storage gate during a sampling period. A driver used to operate the at least one storage gate, senses how much charge was transferred to the storage gate and sets a flag in an analog memory (e.g., stores a voltage in a floating diffusion region) based on the amount of sensed charge. The sensed charge is used to determine an integration time for the pixel.

Abstract: An imaging device having pixels that store charge from a photosensor under at least one storage gate during a sampling period. A driver used to operate the at least one storage gate, estimates how much charge in the pixel exceeds a predetermined limit during a non-destructive pixel sensing operation. A specific voltage is stored on the pixel's floating diffusion region to flag how many times the pixel exceeded the limit. The final pixel signal and the stored information is readout at the end of integration period to create a sum that represents the pixel's final signal value.

Abstract: A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.

Abstract: An imaging device that stores charge from a photosensor under at least one storage gate. A driver used to operate the at least one storage gate, senses how much charge was transferred to the storage gate. The sensed charge is used to obtain at least one signature of the image scene. The at least one signature may then be used for processing such as e.g., motion detection, auto-exposure, and auto-white balancing.

Abstract: A CMOS imager includes an array of active pixel sensors, wherein each pixel is associated with a respective column in the array. The imager also includes multiple circuits for reading out values of pixels from the active sensor array. Each readout circuit can be associated with a respective pair of columns in the array and can include first and second sample-and-hold circuits. The first and second sample-and-hold circuits are associated, respectively, with first and second columns of pixels in the array. Each readout circuit also includes an operational amplifier-based charge sensing circuit that selectively provides an amplified differential output signal based on signals sampled either by the first sample-and-hold circuit or the second sample-and-hold circuit. The readout circuit also has an analog-to-digital converter for converting the differential output to a corresponding digital signal using a successive approximation technique.

Abstract: A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.

Abstract: An imaging device with readout chain circuitry that uses cascaded gain stages to amplify pixel and reset signals from odd and even columns of pixels. The readout chain shares amplifiers between odd and even channels. The last stage of the chain includes noise suppression circuitry designed to suppress kTC and amplifier thermal noise during the readout process.

Abstract: A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.

Abstract: An analog-to-digital converter in an active pixel sensor array includes on board memory elements for storing results. The stored results can be read out in a different order than the order in which they were converted.

Abstract: An imager having column-wise clamp voltage drivers. Each clamp voltage driver is substantially identical to the output circuitry of the imager's pixels in that column and is designed to track the noise experienced by the readout pixels. Each clamp voltage driver generates and drives the appropriate clamp voltage to store reset and pixel signals in associated column sample and hold circuitry while suppressing the noise typically experienced during the readout process.

Abstract: An imager having two panels of pixels (i.e., the imager's rows of pixels are split into two panels) that are controllable by separate row decoders. The dual panel architecture allows pipelining of pixel readout and column readout operations to improve the imager's frame rate. The dual panel architecture may use a standard pixel configuration, a shared column and/or a shared row and column configuration.