Abstract: A sub-ranging DAC converter is provided where voltage followers rather than operational amplifiers are used to avoid loading a main resistor string.

Abstract: A pulse width modulated (PWM) transistor driver circuit, for driving an inductive load, has a load-current sensing resistor and a comparator having an input connected to the sensing resistor and another input to which a PWM control reference voltage may be applied. A PWM driver-control circuit includes a set-dominant PWM latch, and a not.sub.-- regulating detector that may be composed entirely of logic circuit blocks or a combination of logic and analog circuits. By either means, the PWM bridge-control circuit includes a timer for repeatedly generating control pulses that set and hold a PWM latch beginning each PWM period, and the comparator resets the latch each time after the timer pulse the load current rises to exceed a corresponding reference voltage level. A sample-time-interval is defined beginning at the time of termination of a control pulse and a not.sub.-- regulating pulse generator produces a not.sub.

Abstract: A bridge for driving one phase of a stepping motor includes a PWM driver control circuit that repeatedly turns on at least one of the driver transistors. A sense voltage is produced that is directly related to the bridge load current. When a driver-control reference voltage V.sub.ref is applied to the driver-control input, a sense-comparator pulse is generated when the sense voltage exceeds the applied reference voltage for turning off the one driver transistor. The remaining "decay" portion of the PWM period ensues after the driver transistor turns off. A not.sub.-- regulating pulse is generated during a predetermined sample time portion of each driver on-time when the load sense voltage exceeds the applied V.sub.ref. In each PWM period, when a not.sub.-- regulating pulse occurs the bridge driver is operated in the four quadrant decay mode during an initial part of the PWM-period decay portion until time t.sub.m and operating in the two quadrant decay mode for the remainder of the PWM-period decay portion.

Abstract: A bipolar driver circuit includes a primary driver transistor and an independently controlled pre-driver transistor having an emitter connected to the base of the primary driver transistor and a collector connected to the collector of the primary driver transistor. In one embodiment, the collector of the primary driver transistor is connected to the output terminal of the driver circuit for sinking current from a load and, in another embodiment, the emitter of the primary driver transistor is connected to the output terminal of the driver circuit for sourcing current to a load. A first current source is connected to the base of the primary driver transistor and a second current source is connected to the base of the pre-driver transistor. The current sources are commonly controllable by an input signal. Also provided is an inverse conduction prevention circuit for preventing the pre-driver transistor from diverting base current from the primary driver transistor in the sink driver embodiment.

Abstract: A semiconductor integrated circuit has a P-type substrate and a plurality of PN-junction isolated islands of N-type, a first one of the islands may contain a power device which during certain periods of operation causes the first island to become forward biassed and to inject electrons into the substrate. Collection of these injected charges by a second island at one side of the injecting island is reduced by a separate protective bipolar transistor formed in a third N-type island. The third island is preferably interposed between the injecting island and the islands to be protected, but may be located anywhere with respect to the injecting transistor. The emitter of the protective transistor is electrically connected to an N-type portion of the first island. The collector of the protective transistor is connected to the P-type isolation-wall portion of the substrate located between the injecting transistor and the small islands to be protected.

Abstract: In an integrated circuit in which a first PN-junction-isolated island may momentarily become forward biased with respect to the surrounding substrate and inject unwanted charge that is collected by second islands adjacent one side of a first island, the injected charge is drawn away from the second islands and to a gatherer-collector island located at another side of the first island. The first island, gatherer-collector island and intervening substrate therebetween serve respectively as the emitter, collector, and base of a protective transistor. This transistor becomes a highly efficient collector of injected charge when the protective-transistor collector is hard wired to ground and the protective-transistor base is hard-wire connected to the substrate portion between the injecting first island and adjacent second island.