Patents by Inventor Roger Chamberlain

Roger Chamberlain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11742977
    Abstract: Among the various aspects of the present disclosure is the provision of systems or methods for polarization division multiplexed (PDM) optical transmission. For example, the PDM optical transmission system can comprise a chip with one or more aluminum nanowire filters attached to the surface of the chip, such as division of focal Plane (DoFP) polarimeter filter array bonded on the receiver IC.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: August 29, 2023
    Assignee: Washington University
    Inventors: Roger Chamberlain, Darko Ivanovich, Viktor Gruev
  • Publication number: 20210376949
    Abstract: Among the various aspects of the present disclosure is the provision of systems or methods for polarization division multiplexed (PDM) optical transmission. For example, the PDM optical transmission system can comprise a chip with one or more aluminum nanowire filters attached to the surface of the chip, such as division of focal Plane (DoFP) polarimeter filter array bonded on the receiver IC.
    Type: Application
    Filed: January 27, 2020
    Publication date: December 2, 2021
    Applicant: Washington University
    Inventors: Roger Chamberlain, Darko Ivanovich, Viktor Gruev
  • Patent number: 10871475
    Abstract: A method for determining a concentration of a chemical of interest in a recirculating analyte system includes the steps of selecting a first indicator threshold, measuring the flow rate of the recirculating analyte system, controllably adding a known amount of reagent to the recirculating analyte system at an known flow rate, repetitively measuring an indicator of the recirculating analyte system downstream from the addition of the reagent, and computing the concentration of the chemical of interest of the recirculating analyte system when the indicator measurement crosses the indicator threshold.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: December 22, 2020
    Assignee: BECS TECHNOLOGY, INC.
    Inventors: Roger Chamberlain, Chris Edmiston, Brett Steinbrueck, Don Williams
  • Publication number: 20190025267
    Abstract: A method for determining a concentration of a chemical of interest in a recirculating analyte system includes the steps of selecting a first indicator threshold, measuring the flow rate of the recirculating analyte system, controllably adding a known amount of reagent to the recirculating analyte system at an known flow rate, repetitively measuring an indicator of the recirculating analyte system downstream from the addition of the reagent, and computing the concentration of the chemical of interest of the recirculating analyte system when the indicator measurement crosses the indicator threshold.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 24, 2019
    Inventors: Roger CHAMBERLAIN, Chris EDMISTON, Brett STEINBRUECK, Don WILLIAMS
  • Patent number: 10018610
    Abstract: A method for determining the total alkalinity (TA) in a recirculating water system without adversely impacting the pH of the water includes the steps of selecting a pH threshold (ThpH), measuring the flow rate of the moving body of water (fS), controllably adding a known amount of acid to the recirculating water system at an acid flow rate (fA), repetitively measuring the pH of the recirculating water system downstream from the addition of the acid, and computing the total alkalinity of the recirculating water system when the pH measurement falls below the pH threshold.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: July 10, 2018
    Assignee: BECS TECHNOLOGY, INC.
    Inventors: Roger Chamberlain, Chris Edmiston, Brett Steinbrueck, Don Williams
  • Publication number: 20080086274
    Abstract: Disclosed herein is a hardware implementation for performing sequence alignment that preferably deploys a seed generation stage, an ungapped extension stage, and at least a portion of a gapped extension stage as a data processing pipeline on at least one hardware logic device. Hardware circuits for the seed generation stage, the ungapped extension stage, and the gapped extension stage are individually disclosed. In a preferred embodiment, the pipeline is arranged for performing BLASTP sequence alignment searching. Also, in a preferred embodiment, the at least one hardware logic device comprises at least one reconfigurable logic device such as an FPGA.
    Type: Application
    Filed: August 10, 2007
    Publication date: April 10, 2008
    Inventors: Roger Chamberlain, Jeremy Buhler, Arpith Jacob, Joseph Lancaster, Brandon Harris
  • Publication number: 20070277036
    Abstract: A data storage and retrieval device and method is disclosed. The device includes at least one magnetic storage medium configured to store target data and at least one re-configurable logic device comprising an FPGA coupled to the at least one magnetic storage medium and configured to read a continuous stream of target data therefrom, having been configured with a template or as otherwise desired to fit the type of search and data being searched. The re-configurable logic device is configured to receive at least one search inquiry in the form of a data key and to determine a match between the data key and the target data as it is being read from the at least one magnetic storage medium. This device and method can perform a variety of searches on the target data including without limitation exact and approximate match searches, sequence match searches, image match searches and data reduction searches.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 29, 2007
    Applicants: Washington University, a corporation of the State of Missouri, Exegy Incorporated, a corporation of the State of Delaware
    Inventors: Roger Chamberlain, Benjamin Brink, Jason White, Mark Franklin, Ron Cytron
  • Publication number: 20070237327
    Abstract: An encryption technique is disclosed for encrypting a data segment comprising a plurality of data blocks, wherein the security and throughput of the encryption is enhanced by using blockwise independent bit vectors for reversible combination with the data blocks prior to key encryption. Preferably, the blockwise independent bit vectors are derived from a data tag associated with the data segment. Several embodiments are disclosed for generating these blockwise independent bit vectors. In a preferred embodiment, the data tag comprises a logical block address (LBA) for the data segment. Also disclosed herein is a corresponding decryption technique as well as a corresponding symmetrical encryption/decryption technique.
    Type: Application
    Filed: March 22, 2007
    Publication date: October 11, 2007
    Applicant: EXEGY INCORPORATED
    Inventors: David Taylor, Ronald Indeck, Jason White, Roger Chamberlain
  • Publication number: 20070174841
    Abstract: A firmware socket module is deployed on a reconfigurable logic device, wherein the firmware socket module has a communication path between itself and an entry point into a data processing pipeline, wherein the firmware socket module is configured to provide both commands and target data to the entry point in the data processing pipeline via the same communication path, wherein each command defines a data processing operation that is to be performed by the data processing pipeline, and wherein the target data corresponds to the data upon which the data processing pipeline performs its commanded data processing operation. Preferably, the firmware socket module is configured to provide the commands and target data in a predetermined order that is maintained throughout the data processing pipeline.
    Type: Application
    Filed: January 26, 2006
    Publication date: July 26, 2007
    Inventors: Roger Chamberlain, E. F. Shands, Benjamin Brodie, Michael Henrichs, Jason White
  • Publication number: 20070078837
    Abstract: A method and apparatus are disclosed for using decision logic deployed on a reconfigurable logic device to process a stream of financial information at hardware speeds. The decision logic can be configured to perform data reduction operations on the financial information stream. Examples of such data reductions operations include data processing operations to compute a latest stock price, a minimum stock price, and a maximum stock price.
    Type: Application
    Filed: November 20, 2006
    Publication date: April 5, 2007
    Applicant: WASHINGTON UNIVERSITY
    Inventors: Ronald Indeck, Ron Cytron, Mark Franklin, Roger Chamberlain
  • Publication number: 20070067108
    Abstract: A system and method for performing biological sequence similarity searching is disclosed. This includes a programmable logic device configured to include a pipeline that comprises a matching stage, the matching stage being configured to receive a data stream comprising a plurality of possible matches between a plurality of biological sequence data strings and a plurality of substrings of a query string. The pipeline may further include a ungapped extension prefilter stage located downstream from the matching stage, the prefilter stage being configured to shift through pattern matches between the biological sequence data strings and the plurality of substrings of a query string and provide a score so that only pattern matches that exceed a user defined score will pass downstream from the prefilter stage. The matching stage may include at least one Bloom filter.
    Type: Application
    Filed: February 22, 2006
    Publication date: March 22, 2007
    Inventors: Jeremy Buhler, Roger Chamberlain, Mark Franklin, Kwame Gyang, Arpith Jacob, Praveen Krishnamurthy, Joseph Lancaster
  • Publication number: 20060294059
    Abstract: A data storage and retrieval device and method is disclosed. The device includes at least one magnetic storage medium configured to store target data and at least one re-configurable logic device comprising an FPGA coupled to the at least one magnetic storage medium and configured to read a continuous stream of target data therefrom, having been configured with a template or as otherwise desired to fit the type of search and data being searched. The re-configurable logic device is configured to receive at least one search inquiry in the form of a data key and to determine a match between the data key and the target data as it is being read from the at least one magnetic storage medium. This device and method can perform a variety of searches on the target data including without limitation exact and approximate match searches, sequence match searches, image match searches and data reduction searches.
    Type: Application
    Filed: May 21, 2004
    Publication date: December 28, 2006
    Inventors: Roger Chamberlain, Mark Franklin, Ronald Indeck, Ron Cytron, Sharath Cholleti
  • Publication number: 20050284381
    Abstract: An expandable livestock facility equipment network over which data is received from various automated pieces of equipment or monitors, and utilized by a control unit to provide an overall indication of the status of the livestock facility, including feed supply management, animal health conditions, and equipment operational conditions.
    Type: Application
    Filed: June 4, 2004
    Publication date: December 29, 2005
    Inventors: Timothy Bell, Roger Chamberlain