Abstract: A stream of data words is written into a memory, organised on the basis of multi-word blocks, by collecting consecutively occurring words having the same block address and transferring those words to the memory in parallel, only when a word with a new block address appears. This reduces the number of memory accesses required and hence permits faster operation.

Abstract: Instructions are written in multi-word blocks into an instruction buffer from a slave store, and then scanned sequentially. The instruction buffer is unequally divided, a first part of a block being written into the smaller portion of the buffer during scanning of the larger portion, and the remainder of the block being written into the larger portion during scanning of the smaller portion. Thus, more time is available for an initial write from a block, which is when delays are more likely to occur due to the block having to be fetched from main store.

Abstract: A stage of a pipeline data processor has a store associated with it, and when that stage requires to write data into a specified address within that store, but the data to be written is not yet available, an indication of the address is stored in a special reserved register, so as to permit subsequent accesses to the store without waiting for that data to become available. When the data eventually becomes available, it is written into the store, using the contents of the register for addressing the store. This prevents hold-ups in the pipeline and hence increases the effective rate of instruction execution.