Abstract: A technique for performing a time slot interchange in a processor. The TSI process is surrounded by a multiplexing/demultiplexing circuit for converting a plurality of PCM highways into a single input serial data stream. The mux/demux circuit includes elastic stores to align frames and shift resisters to mux/demux with a minimum of delay. The TSI processor includes an input and an output buffered series port, a pair of input buffers, one to receive even-numbered frames from the PCM highways and one to receive odd-numbered frames, and an output buffer. Data is read from the appropriate input buffer in a non-sequential fashion as commanded by the processor in accordance with information stored in connection arrays (address buffers). The data is then written to the output buffer sequentially. The timing of the reading and writing steps is optimized relative to free running buffered serial port pointers for each BSP to reduce the frame delay.

Abstract: A telecommunication device for receiving and transmitting DS1 level signals that includes a 1/0 digital cross-connect switch, a GR-303 concentrator, and a frame relay aggregator switch in a single integrated device in one housing that fills less than two standard rack units. The device includes both active and standby/backup controller cards that communicate with eight quad framer cards through a bus located in the backplane. The communication through the backplane is via a 8.192 Mbps signal to and from each quad framer card, passed along a bus. The 8.192 Mbps signal is generated by multiplexing the four DS1 (E-1) signals on the quad framer card. The controller card that is active monitors the status of the DS1 channel associated with each framer and stores historical data about the status in spare buffer registers on each framer. Whenever a transition occurs to the standby/backup controller card, that card can obtain the historical status information from the framers to make the transition more seamless.

Abstract: A multiplexer for multiplexing and demultiplexing signals between a low-speed network and a higher speed network includes 7 quad DSX-1 cards and 1 spare card. The spare card is connected to the DSX-1 cards to allow the spare card to automatically be switched in for one of the DSX-1 cards or to allow interface electronics on the spare card to replace selected ones of interface electronics on different DSX-1 cards simultaneously. A pair of controller cards, a primary card and a secondary card, perform M1-3 multiplexing and demultiplexing and the DS-3 framing and transceiving. The controller cards can be selected or deselected in a short time period alarms are not set off and so that the transition is hitless by electronically enabling and disabling the transceiver. The multiplexer is connectable to 2 different T-3 links to provide network redundancy. An array of relays connected either controller card to either of the T-3 links.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for performing a time slot interchange in a processor. The TSI process is surrounded by a multiplexing/demultiplexing circuit for converting a plurality of PCM highways into a single input serial data stream. The mux/demux circuit includes elastic stores to align frames and shift resisters to mux/demux with a minimum of delay. The TSI processor includes an input and an output buffered serial port, a pair of input buffers, one to receive even-numbered frames from the PCM highways and one to receive odd-numbered frames, and an output buffer. Data is read from the appropriate input buffer in a non-sequential fashion as commanded by the processor in accordance with information stored in connection arrays (address buffers). The data is then written to the output buffer sequentially. The timing of the reading and writing steps is optimized relative to free running buffered serial port pointers for each BSP to reduce the frame delay.

Abstract: A multiplexer device for multiplexing and demultiplexing signals between a low-speed network including 28 DSX-1 signals and a relatively higher speed network including a DS-3 signal. The multiplexer device includes 7 quad DSX-1 cards and 1 spare card. The spare card is connected to the other 7 DSX-1 cards in a fashion that allows the spare card to automatically be switched in for one of the DSX-1 cards or to allow interface electronics on the spare card to replace selected ones of the interface electronics on various different DSX-1 cards simultaneously. A pair of controller cards, a primary card and a secondary card, perform the M1-3 multiplexing and demultiplexing and the DS-3 framing and transceiving. The controller cards can be selected or deselected by distributed logic in a sufficiently short time period so that alarms are not set off and so that the transition is hitless. This is accomplished by electronically enabling and disabling the transceiver.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for powering telephone lines using an unbalanced current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.

Abstract: A technique for powering telephone lines using an unbalance current source and current sink; and a technique for improving attenuation/frequency distribution and return loss (impedance matching) of transformer-coupled wire-line communications circuits by using secondary series capacitance and an AC current pump signal source; and a generation of ringing voltage as positive voltage pulses with respect to a negative power supply voltage; and a technique for removal of AC power ripple by using an active linear floating filter for the purpose of powering telephone line circuits, and a technique for injection of real time tone samples into T1 transmissions circuits by use of a T1 framer idle code register.