Abstract: An all-analog natural language processing system is provided. Analog audio input is processed directly by an all-analog signal pathway wherein the audio activity detection, voice activity detection, feature extraction and neural network processing are all performed in the analog domain. Audio/voice detection and feature extraction is performed by a bandpass filter bank having a plurality of individual bandpass filters. Each bandpass filter includes an array of individual capacitively coupled current conveyor second order sections having a charge-trap transistor as a programmable element for tuning the passband of the filter. Compared to typical digital systems for natural language processing, the present all-analog system can perform natural language processing with comparable accuracy but greatly reduced energy consumption of up to two orders of magnitude less.

Abstract: Analog image processing systems and methods are provided. The systems are configured to convert a pixel output signal to a time pulse without analog to digital signal conversion. Pixel output voltage is sampled and the pixel voltage is applied to a capacitor. A comparator configured to sense the pixel voltage on the capacitor as the capacitor is discharged generates output time pulses. The output time pulse is proportional to the pixel voltage and may be processed by an all-analog neural network to perform functions such as object detection, object classification, image quality enhancement and always-on image processing with low power consumption.

Abstract: An all-analog natural language processing system is provided. Analog audio input is processed directly by an all-analog signal pathway wherein the audio activity detection, voice activity detection, feature extraction and neural network processing are all performed in the analog domain. Audio/voice detection and feature extraction is performed by a bandpass filter bank having a plurality of individual bandpass filters. Each bandpass filter includes an array of individual capacitively coupled current conveyor second order sections having a charge-trap transistor as a programmable element for tuning the passband of the filter. Compared to typical digital systems for natural language processing, the present all-analog system can perform natural language processing with comparable accuracy but greatly reduced energy consumption of up to two orders of magnitude less.

Abstract: Provided are computer systems, methods, and devices for operating an artificial neural network. The system includes neurons. The neurons include a plurality of synapses including charge-trapped transistors for processing input signals, an accumulation block for receiving drain currents from the plurality of synapses, the drain currents produced as an output of multiplication from the plurality of synapses, the drain currents calculating an amount of voltage multiplied by time, a capacitor for accumulating charge from the drain currents to act as short-term memory for accumulated signals, a discharge pulse generator for generating an output signal by discharging the accumulated charge during a discharging cycle, and a comparator for comparing an input voltage with a reference voltage. The comparator produces a first output if the input voltage is above the reference voltage and produces a second output if the input voltage is below the reference voltage.

Abstract: Provided are computer systems, methods, and devices for operating an artificial neural network. The system includes neurons. The neurons include a plurality of synapses including charge-trapped transistors for processing input signals, an accumulation block for receiving drain currents from the plurality of synapses, the drain currents produced as an output of multiplication from the plurality of synapses, the drain currents calculating an amount of voltage multiplied by time, a capacitor for accumulating charge from the drain currents to act as short-term memory for accumulated signals, a discharge pulse generator for generating an output signal by discharging the accumulated charge during a discharging cycle, and a comparator for comparing an input voltage with a reference voltage. The comparator produces a first output if the input voltage is above the reference voltage and produces a second output if the input voltage is below the reference voltage.

Abstract: Systems and apparatus for implementation and management of a fast data connection in a computer network and methods for making and using the same. In various embodiment, these technologies are used to facilitate fast data exchanges between network nodes among other things.

Abstract: A method and apparatus may include receiving data from a first device. The data may be received via a first protocol. The method can also include converting the data to be transmitted via a second protocol. The second protocol may be a high-speed proprietary or standard protocol. The method can also include transmitting the data via the second protocol to a second device.

Abstract: Systems and apparatuses for performing fast file transfers and methods for making and using the same. In various embodiments, the system advantageously can eliminate distance constraints between multi-site computational environments, provide a dramatic reduction in transfer and/or dynamically provision bandwidth on a fabric of the system among other things.

Abstract: Certain embodiments may relate to providing increased storage capacity. For instance, a memory storage device may include a motherboard with an external communication interface. The memory storage device may also include a multiple solid-state drives coupled to the motherboard in communication with the external communication interface. Each of the plurality of solid-state drives may include a respective storage controller to manage the distribution of data during a write or read operation to a combination of a primary storage allocation and a redundant storage allocation. The redundant storage allocation may be included in the combination in response to detecting an error condition associated with at least a portion of the primary storage allocation.

Abstract: Systems and apparatus for accelerating remote data object processing and methods for making and using the same. In various embodiment, these technologies are used to initiate processing of data parcels by a remote server immediately upon receipt and without waiting for additional data parcels to arrive among other things.

Abstract: Systems and apparatuses for performing fast file transfers and methods for making and using the same. In various embodiments, the system advantageously can eliminate distance constraints between multi-site computational environments, provide a dramatic reduction in transfer and/or dynamically provision bandwidth on a fabric of the system among other things.

Abstract: Systems and apparatus for performing fast file transfers and methods for making and using the same. In various embodiment, the system advantageously can eliminate distance constraints between multi-site computational environments and provide a dramatic reduction in transfer among other things.

Abstract: Systems and apparatus for implementation and management of a fast data connection in a computer network and methods for making and using the same. In various embodiment, these technologies are used to facilitate fast data exchanges between network nodes among other things.

Abstract: Systems, methods and apparatus, including computer program products, are disclosed for management and transportation of data in a networked environment or solution. In various embodiment, these technologies are used to transport data across individual wires or connections using uniform connection technology but different protocols. Software-based control is also described, which provides additional flexibility in the selection and configuration of protocol usage.

Abstract: Systems, methods and apparatus, including computer program products, are disclosed for management and transportation of data in a networked environment or solution. In various embodiment, these technologies are used to transport data across individual wires or connections using uniform connection technology but different protocols. Software-based control is also described, which provides additional flexibility in the selection and configuration of protocol usage.

Abstract: A method and apparatus may include receiving data from a first device. The data may be received via a first protocol. The method can also include converting the data to be transmitted via a second protocol. The second protocol may be a high-speed proprietary or standard protocol. The method can also include transmitting the data via the second protocol to a second device.

Abstract: Certain embodiments may relate to providing increased storage capacity. For instance, a memory storage device may include a motherboard with an external communication interface. The memory storage device may also include a multiple solid-state drives coupled to the motherboard in communication with the external communication interface. Each of the plurality of solid-state drives may include a respective storage controller to manage the distribution of data during a write or read operation to a combination of a primary storage allocation and a redundant storage allocation. The redundant storage allocation may be included in the combination in response to detecting an error condition associated with at least a portion of the primary storage allocation.

Abstract: A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.

Abstract: A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.

Abstract: A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.