Abstract: A delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect a changed level; and at least one digital output circuit configured to generate an event output under the condition of the changed level. The sensor circuit is configured to change an analogue function of its read-out characteristics to generate a respective changed VSIG.

Abstract: A delta image sensor comprising a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one single slope analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal, wherein the A/D circuit (12) is configured to use one of a plurality of ramps for the conversion; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output, in response to the changed level.

Abstract: A delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. A digital representation may be externally written to the digital storage circuit of the at least one pixel.

Abstract: A delta image sensor comprising an arrangement of pixels and acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes a sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; a digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and a digital output circuit configured to generate an event output when the level has changed. The repeat rate of the analogue to digital conversion is chosen from one or more repeat rates corresponding to modulation of the light signal.

Abstract: The present disclosure relates to an image sensor comprising a plurality of pixel circuits each comprising a photodiode connected between ground and a floating diffusion (FD) node, a reset transistor (MRST) connected between a first voltage supply and the floating diffusion (FD) node, and a source follower transistor (MSF), wherein its drain is connected to a second voltage supply, the gate is connected to a floating diffusion (FD) node and the source is connected to a row select transistor (MSEL). The row select transistor (MSEL) is connected between the source of the source follower transistor (MSF) and a common column output. Each pixel circuit is configured to output an output signal corresponding to a light incident on the photodiode. Each pixel circuit includes at least one additional transistor for configuring each pixel circuit to selectively output a linear integration signal or a logarithmic signal.

Abstract: The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level.

Abstract: The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level.

Abstract: A delta image sensor comprising a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one single slope analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal, wherein the A/D circuit (12) is configured to use one of a plurality of ramps for the conversion; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output, in response to the changed level.

Abstract: A delta image sensor comprising an arrangement of pixels and acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes a sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; a digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and a digital output circuit configured to generate an event output when the level has changed. The repeat rate of the analogue to digital conversion is chosen from one or more repeat rates corresponding to modulation of the light signal.

Abstract: The present disclosure relates to an image sensor comprising a plurality of pixel circuits each comprising a photodiode connected between ground and a floating diffusion (FD) node, a reset transistor (MRST) connected between a first voltage supply and the floating diffusion (FD) node, and a source follower transistor (MSF), wherein its drain is connected to a second voltage supply, the gate is connected to a floating diffusion (FD) node and the source is connected to a row select transistor (MSEL). The row select transistor (MSEL) is connected between the source of the source follower transistor (MSF) and a common column output. Each pixel circuit is configured to output an output signal corresponding to a light incident on the photodiode. Each pixel circuit includes at least one additional transistor for configuring each pixel circuit to selectively output a linear integration signal or a logarithmic signal.

Abstract: The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level.

Abstract: The present case concerns the manufacture of hybrid electrooptical chips. A substrate is treated so that it can both provide locations for electrooptical components and be etched so as to generate grooves in which optical fibers can be mounted. During the etching of the grooves any electrooptical component already mounted on the substrate is protected from damage by the etchant by a protective coating. A feature is that optical fibers can be mounted with their cores above the surface of the wafer.

Abstract: A miniature mounting device on which elements such as optical filters can be accurately held. The device includes a substrate having a machined groove with an enlarged opening for receiving the element, and an overlayer extends at least partially over the groove to clamp the element.