Patents by Inventor Roger Norwood

Roger Norwood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6784367
    Abstract: Microelectronic devices having a protected input and methods for manufacturing such microelectronic devices. A microelectronic device has a microelectronic die and a support structure for coupling the die to voltage and signal sources. The microelectronic die can have integrated circuitry and a plurality of bond-pads coupled to the integrated circuitry. The bond-pads, for example, can include a reference voltage (Vref) bond-pad and a signal bond-pad adjacent to the Vref bond-pad. The signal bond-pad can be for a clock signal, a data signal, a strobe signal, an address signal, or another type signal for operating the integrated circuitry. The support structure can be a lead frame or a interposing substrate having a plurality of conductive members coupled to the bond-pads of the die. The conductive members can accordingly be metal pins in the case of lead frames or traces and solder ball-pads in the case of interposing substrates.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: August 31, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Ernest J. Russell, Bharath Nagabhushanam, Terry Lee, Roger Norwood
  • Publication number: 20030127241
    Abstract: Microelectronic devices having a protected input and methods for manufacturing such microelectronic devices. A microelectronic device has a microelectronic die and a support structure for coupling the die to voltage and signal sources. The microelectronic die can have integrated circuitry and a plurality of bond-pads coupled to the integrated circuitry. The bond-pads, for example, can include a reference voltage (Vref) bond-pad and a signal bond-pad adjacent to the Vref bond-pad. The signal bond-pad can be for a clock signal, a data signal, a strobe signal, an address signal, or another type signal for operating the integrated circuitry. The support structure can be a lead frame or a interposing substrate having a plurality of conductive members coupled to the bond-pads of the die. The conductive members can accordingly be metal pins in the case of lead frames or traces and solder ball-pads in the case of interposing substrates.
    Type: Application
    Filed: February 25, 2003
    Publication date: July 10, 2003
    Inventors: Ernest J. Russell, Bharath Nagabhushanam, Terry Lee, Roger Norwood
  • Patent number: 6548757
    Abstract: Microelectronic devices having a protected input and methods for manufacturing such microelectronic devices. A microelectronic device has a microelectronic die and a support structure for coupling the die to voltage and signal sources. The microelectronic die can have integrated circuitry and a plurality of bond-pads coupled to the integrated circuitry. The bond-pads, for example, can include a reference voltage (Vref) bond-pad and a signal bond-pad adjacent to the Vref bond-pad. The signal bond-pad can be for a clock signal, a data signal, a strobe signal, an address signal, or another type signal for operating the integrated circuitry. The support structure can be a lead frame or a interposing substrate having a plurality of conductive members coupled to the bond-pads of the die. The conductive members can accordingly be metal pins in the case of lead frames or traces and solder ball-pads in the case of interposing substrates.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: April 15, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Ernest J. Russell, Bharath Nagabhushanam, Terry Lee, Roger Norwood
  • Patent number: 6069829
    Abstract: A circuit is designed with a clock circuit (215, 217) coupled to receive a control signal having a first logic state and a second logic state. The clock circuit produces a first clock signal (CLK) response to the first logic state and a second clock signal (*CLK) in response to the second logic state. The second clock signal has a frequency at least twice a frequency of the first clock signal. An address counter (221) is coupled to receive one of the first and second clock signals. The address counter produces a sequence of address signals corresponding to the one of the first and second clock signals. An array of memory cells is arranged to produce a sequence of data bits corresponding to the sequence of address signals. A logic circuit (235, 239, 240) is coupled to receive the sequence of data bits. The logic circuit produces a logical combination of the sequence of data bits.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: May 30, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Yutaka Komai, Roger Norwood, Daniel B. Penny