Patents by Inventor Roger Poulenard

Roger Poulenard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5254989
    Abstract: A garbling method for 9 non-coded matrix keyboard, and the circuit for performing the method. includesa) connecting at the output each row and column of the keyboard to the outputs of a first register (160) of a parallel to the outputs of a first register (160) of a parallel input-output interface (16), via a circuit (163, 166, 164);b) connecting each row and column of the keyboard to the individual inputs of a second register 162 of the input-output interface.c) randomly setting the order in which the outputs of the first register will be scanned;d) setting at least one of the outputs of the first register at "1" and checking whether one of the corresponding inputs of the second register is at "1";e) if not, scanning the remaining lines one by one by placing them each at "1" until the associated input is at the value "1";f) repeating steps d) and e) to determine the column or row respectively, corresponding to the key of the keyboard that has been depressed.
    Type: Grant
    Filed: July 8, 1991
    Date of Patent: October 19, 1993
    Assignee: Bull S.A.
    Inventors: Philippe Verrier, Roger Poulenard, Hartmut Fink
  • Patent number: 5239664
    Abstract: The present invention relates to an arrangement for protecting an electronic card and to its use for protecting a terminal for reading a magnetic card and/or a microprocessor card. An arrangement for protecting a card including, on a printed circuit, an electronic circuit with volatile memory (12) containing programs or information to be protected, characterized in that it includes a resistive network (21, 22) surrounding the circuit (1) embedded in the resin (3), the resistive network (21, 22) being incorporated in an electronic circuit (10) for detecting modifications to the resistance of the network, to bring about a destruction of the information of the volatile memories (12).
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: August 24, 1993
    Assignee: Bull S.A.
    Inventors: Philippe Verrier, Roger Poulenard