Abstract: A direct-type LED backlight module includes a back bezel having opposite first and second surfaces, a daughterboard having opposite third and fourth surfaces, LED lightbars disposed on the first surface, and a local dimming control board disposed on the second surface. The first surface has a groove disposed thereon. The second surface has a through hole disposed thereon and communicating with the groove. The daughterboard is disposed in the groove. The third surface has first connectors disposed thereon and protruding out the groove. The fourth surface has a second connector disposed thereon and protruding out the second surface through the through hole. The first and second connectors are electrically connected. Each LED lightbar has a third connector disposed thereon and connected to the corresponding first connector. The local dimming control board has a fourth connector disposed thereon and connected to the second connector. It reduces wiring cost and assembly time.

Abstract: A direct-type LED backlight module includes a back bezel having opposite first and second surfaces, a daughterboard having opposite third and fourth surfaces, LED lightbars disposed on the first surface, and a local dimming control board disposed on the second surface. The first surface has a groove disposed thereon. The second surface has a through hole disposed thereon and communicating with the groove. The daughterboard is disposed in the groove. The third surface has first connectors disposed thereon and protruding out the groove. The fourth surface has a second connector disposed thereon and protruding out the second surface through the through hole. The first and second connectors are electrically connected. Each LED lightbar has a third connector disposed thereon and connected to the corresponding first connector. The local dimming control board has a fourth connector disposed thereon and connected to the second connector. It reduces wiring cost and assembly time.

Abstract: A device and method associated with carbon nanowires, such as single walled carbon nanowires having a high degree of alignment are set forth herein. A catalyst layer is deposited having a predetermined crystallographic configuration so as to control a growth parameter, such as an alignment direction, a diameter, a crystallinity and the like of the carbon nanowire. The catalyst layer is etched to expose a sidewall portion. The carbon nanowire is nucleated from the exposed sidewall portion. An electrical circuit device can include a single crystal substrate, such as Silicon, and a crystallographically oriented catalyst layer on the substrate having an exposed sidewall portion. In the device, carbon nanowires are disposed on the single crystal substrate aligned in a direction associated with the crystallographic properties of the catalyst layer.

Abstract: A device and method associated with carbon nanowires, such as single walled carbon nanowires having a high degree of alignment are set forth herein. A catalyst layer is deposited having a predetermined crystallographic configuration so as to control a growth parameter, such as an alignment direction, a diameter, a crystallinity and the like of the carbon nanowire. The catalyst layer is etched to expose a sidewall portion. The carbon nanowire is nucleated from the exposed sidewall portion. An electrical circuit device can include a single crystal substrate, such as Silicon, and a crystallographically oriented catalyst layer on the substrate having an exposed sidewall portion. In the device, carbon nanowires are disposed on the single crystal substrate aligned in a direction associated with the crystallographic properties of the catalyst layer.

Abstract: A device and method associated with carbon nanowires, such as single walled carbon nanowires having a high degree of alignment are set forth herein. A catalyst layer is deposited having a predetermined crystallographic configuration so as to control a growth parameter, such as an alignment direction, a diameter, a crystallinity and the like of the carbon nanowire. The catalyst layer is etched to expose a sidewall portion. The carbon nanowire is nucleated from the exposed sidewall portion. An electrical circuit device can include a single crystal substrate, such as Silicon, and a crystallographically oriented catalyst layer on the substrate having an exposed sidewall portion. In the device, carbon nanowires are disposed on the single crystal substrate aligned in a direction associated with the crystallographic properties of the catalyst layer.

Abstract: A device and method associated with carbon nanowires, such as single walled carbon nanowires having a high degree of alignment are set forth herein. A catalyst layer is deposited having a predetermined crystallographic configuration so as to control a growth parameter, such as an alignment direction, a diameter, a crystallinity and the like of the carbon nanowire. The catalyst layer is etched to expose a sidewall portion. The carbon nanowire is nucleated from the exposed sidewall portion. An electrical circuit device can include a single crystal substrate, such as Silicon, and a crystallographically oriented catalyst layer on the substrate having an exposed sidewall portion. In the device, carbon nanowires are disposed on the single crystal substrate aligned in a direction associated with the crystallographic properties of the catalyst layer.

Abstract: A method of uniquely extracting both intrinsic and parasitic components from a single set of measured S-parameters is useful for extracting a single set of measured S-parameters for the development of non-linear Field Effect Transistor (FET) models. Competitive extraction where multiple trial solutions are attempted spanning a region or space of feedback impedances is used. Extraction is followed by optimization that reduces the extracted values to a model that better fits measured S-parameters. Optimization can be achieved by further evaluating the speed of convergence in an error metric.