Patents by Inventor ROGER TO-HOI SZETO

ROGER TO-HOI SZETO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabricating power semiconductor device
    Patent number: 10490629
    Abstract: A method for forming power semiconductor device is provided. The power semiconductor device includes a substrate having a device region and a surrounding termination region; and at least a power device formed in the device region of the substrate. The power semiconductor substrate also includes a termination structure having a plurality of semiconductor plugs formed in a first surface of the termination region of the substrate. Wherein the plurality of the semiconductor plugs are formed in a plurality of ring trenches formed in the first surface of the substrate in the termination regions, with a semiconductor plug formed in each of the plurality of ring trenches.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: November 26, 2019
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Dae Sub Jung, Bo Liu, Roger To-Hoi Szeto
  • METHOD FOR FABRICATING POWER SEMICONDUCTOR DEVICE
    Publication number: 20180308932
    Abstract: A method for forming power semiconductor device is provided. The power semiconductor device includes a substrate having a device region and a surrounding termination region; and at least a power device formed in the device region of the substrate. The power semiconductor substrate also includes a termination structure having a plurality of semiconductor plugs formed in a first surface of the termination region of the substrate. Wherein the plurality of the semiconductor plugs are formed in a plurality of ring trenches formed in the first surface of the substrate in the termination regions, with a semiconductor plug formed in each of the plurality of ring trenches.
    Type: Application
    Filed: June 26, 2018
    Publication date: October 25, 2018
    Inventors: DAE SUB JUNG, BO LIU, ROGER TO-HOI SZETO
  • Powers semiconductor device
    Patent number: 10032865
    Abstract: A power semiconductor device is provided. The power semiconductor device includes a substrate having a device region and a surrounding termination region; and at least a power device formed in the device region of the substrate. The power semiconductor substrate also includes a termination structure having a plurality of semiconductor plugs formed in a first surface of the termination region of the substrate. Wherein the plurality of the semiconductor plugs are formed in a plurality of ring trenches formed in the first surface of the substrate in the termination regions, with a semiconductor plug formed in each of the plurality of ring trenches.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: July 24, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Dae Sub Jung, Bo Liu, Roger To-Hoi Szeto
  • POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
    Publication number: 20160293698
    Abstract: A power semiconductor device is provided. The power semiconductor device includes a substrate having a device region and a surrounding termination region; and at least a power device formed in the device region of the substrate. The power semiconductor substrate also includes a termination structure having a plurality of semiconductor plugs formed in a first surface of the termination region of the substrate. Wherein the plurality of the semiconductor plugs are formed in a plurality of ring trenches formed in the first surface of the substrate in the termination regions, with a semiconductor plug formed in each of the plurality of ring trenches.
    Type: Application
    Filed: February 8, 2016
    Publication date: October 6, 2016
    Inventors: DAE SUB JUNG, BO LIU, ROGER TO-HOI SZETO