Patents by Inventor Roger W. Swanson
Roger W. Swanson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6831653Abstract: A system and method for packing pixels together to provide a increased fill rate in a frame buffer hardware in the graphics system. The graphics system may be configured to receive and rasterize graphics data at a faster cycle rate than the system's frame buffer memory fill rate. The output from the rasterization hardware may be stored in a FIFO memory that is configured to selectively shift pixels in order to improve fill rate performance. The FIFO memory may be configured to ensure that the pixels meet certain criteria in order to prevent page faults and interleave conflicts that could reduce the fill rate. The FIFO memory may also be configured to remove empty cycles that occur as a result of the pixel packing.Type: GrantFiled: July 31, 2001Date of Patent: December 14, 2004Assignee: Sun Microsystems, Inc.Inventors: David Kehlet, Nandini Ramani, Yan Yan Tang, Roger W. Swanson
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Publication number: 20030025701Abstract: A system and method for packing pixels together to provide a increased fill rate in a frame buffer hardware in the graphics system. The graphics system may be configured to receive and rasterize graphics data at a faster cycle rate than the system's frame buffer memory fill rate. The output from the rasterization hardware may be stored in a FIFO memory that is configured to selectively shift pixels in order to improve fill rate performance. The FIFO memory may be configured to ensure that the pixels meet certain criteria in order to prevent page faults and interleave conflicts that could reduce the fill rate. The FIFO memory may also be configured to remove empty cycles that occur as a result of the pixel packing.Type: ApplicationFiled: July 31, 2001Publication date: February 6, 2003Inventors: David Kehlet, Nandini Ramani, Yan Yan Tang, Roger W. Swanson
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Publication number: 20020180747Abstract: A graphics system configured to apply multiple layers of texture information to primitives. The graphics system receives parameters defining a primitive and performs a size test on the primitive. If the size test cannot guarantee that a fragment size of the primitive is less than or equal to a fragment capacity of a texture accumulation buffer, the primitive is divided into subprimitives, and the graphics system applies the multiple layers of texture to fragments which intersect the primitive. The graphics system switches from a current layer to the layer next when it has applied textures corresponding to the current layer to all the fragments intersecting the primitive. The graphics system stores color values associated with the primitive fragments in the texture accumulation buffer between the application of successive texture layers.Type: ApplicationFiled: May 18, 2001Publication date: December 5, 2002Applicant: Sun Microsystems, Inc.Inventors: Michael G. Lavelle, Wayne A. Morse, Ranjit S. Oberoi, David C. Kehlet, Michael A. Wasserman, Brian D. Emberling, Roger W. Swanson
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Patent number: 5990912Abstract: A data accessing system provides access data to video display stored in one or more frame buffers via a virtual frame buffer implemented as a phantom port. The virtual frame buffer facilitates remapping between pixel coordinate space and memory address space for both tiled and linear addressing schemes. Generation of virtual linear and virtual tiled addresses is obtained through one or more of shifting, replacing, and concatenating operations. These operations can be implemented to perform very fast in comparison to the multiplication, addition, division, and modulo operations used in conventional display processors, video controllers, and central processing units. In some embodiments of the virtual addresses are converted to addresses in a frame buffer for accessing the frame buffer. Alternate embodiments use a frame buffer adapted to respond directly to generated virtual addresses.Type: GrantFiled: June 27, 1997Date of Patent: November 23, 1999Assignee: S3 IncorporatedInventor: Roger W. Swanson
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Patent number: 5840143Abstract: A method of making an identification card by advancing a continuous web having a first side and a second side along a predetermined path and coating a first portion of the first side with a release agent. The first portion and a second portion of the first side are then coated with a pressure sensitive adhesive, the second portion being adjacent to the first portion and about the same size as the first portion. Next, a sheet of clear plastic is adhered to the adhesive so that the plastic overlays the first and second portions. The plastic sheet and the web are then perforated or die cut around the outer periphery of the first and second portions. The web is also perforated or die cut between the first and second portions. Next, only the first portion of the web is then removed from the plastic sheet and the second portion of the web to expose one-half of the plastic sheet and the adhesive thereon while maintaining the entire second portion with the plastic sheet.Type: GrantFiled: May 3, 1996Date of Patent: November 24, 1998Assignee: Champion Business Forms, Inc.Inventor: Roger W. Swanson
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Patent number: 5421028Abstract: A pipelined processing system in which context switching for each of the pipelined processing circuits within the pipeline may be accomplished without flushing the data from the pipeline. This is accomplished by sending the pipeline commands and data together through the pipeline and differentiating the commands from the data using a flag added to the commands and data which specifies whether the associated data word is a command or data. During operation of the pipeline, when the input data is received by one of the pipelined processing circuits in the pipeline, the flag is checked to see if the associated data word includes a command. If the associated data word includes data to be processed, it is processed in accordance with the current configuration of the pipeline.Type: GrantFiled: March 31, 1994Date of Patent: May 30, 1995Assignee: Hewlett-Packard CompanyInventor: Roger W. Swanson
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Patent number: 5224208Abstract: A method and apparatus for performing the majority of texture map gradient calculations once per polygon so as to increase processing speed in a graphics system. Texture values are identified for each vertex of an input polygon and are interpolated over the polygon in perspective space in order to find the corresponding values at a given pixel within the polygon. The perspective values of the vertices are linearly interpolated across the polygon to determine the value at the given pixel. The texture gradients are then calculated by defining vectors perpendicular and parallel to the horizon of the plane containing the input polygon so that the resulting components may be calculated. The resulting value is the texture gradient, which may then be used to address a texture map to determine the pre-filtered texture value for that point. A hardware implementation performs the necessary calculations for each pixel in the input polygon.Type: GrantFiled: March 16, 1990Date of Patent: June 29, 1993Assignee: Hewlett-Packard CompanyInventors: Robert H. Miller, Jr., Roger W. Swanson
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Patent number: 5222204Abstract: A method and apparatus for interpolating pixels to be displayed on a display screen so as to account for the nonlinearity of distance changes in the perspective projection of a 3-D object onto the display for corresponding linear distance changes in 3-D world space. Each pixel of an input polygon to be displayed on the display screen is given a perspective value in world coordinates for each display point, and this value is passed through the graphics processor along with the shading parameters associated with the each display point. The respective shading parameters for each display point are then scaled by the perspective value for each display point to account for the effects of perspective foreshortening of the displayed object on the display screen. Since no translation to world coordinates is required for the perspective scaling, fast hardware circuitry may be used.Type: GrantFiled: March 14, 1990Date of Patent: June 22, 1993Assignee: Hewlett-Packard CompanyInventor: Roger W. Swanson
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Patent number: 5025405Abstract: A pipelined interpolator precomputes both integer and fractional portions of the slope of the function to be interpolated. The fractional portions of the starting value of the dependent variable to be incremented and the fractional value of the slope by which the increment occurs are each scaled to allow integer arithmetic. The scaled fractional portion of the starting value of the dependent variable is offset by a constant to allow carry-outs to be detected with the comparison "greater than or equal to zero." The occurrence of a carry-out causes the (unscaled) integer portion of the dependent variable to be incremented by the (unscaled) integer portion of the slope. A selected one of two pairs of simultaneous integer additions on the sets of the integer portion and the scaled fractional portion of the dependent variable will be performed. One pair is selected when the carry-out from the scaled fractional portion did not occur. The other pair is selected when it did.Type: GrantFiled: October 11, 1989Date of Patent: June 18, 1991Assignee: Hewlett-Packard CompanyInventor: Roger W. Swanson