Abstract: A method for vias and monolithic interconnects in thin-film optoelectronic devices in which at least one line segment via hole is formed by laser drilling and passes through front-contact layers and semiconductive active layer, and in which laser drilling causes forming a CIGS-type wall of electrically conductive permanently metalized copper-rich CIGS-type alloy at the inner surface of the via hole, forming a conductive path between at least a portion of front-contact and a portion of back-contact layers, forming a bump-shaped raised portion at the surface of the front-contact layer, forming a raised portion of the back-contact layer, and optionally forming a raised portion of copper-rich CIGS-type alloy covering a portion of the front-contact layer. A thin-film CIGS device includes at least one line segment via hole obtainable by the method.

Abstract: A method for vias and monolithic interconnects in thin-film optoelectronic devices in which at least one line segment via hole is formed by laser drilling and passes through front-contact layers and semiconductive active layer, and in which laser drilling causes forming a CIGS-type wall of electrically conductive permanently metalized copper-rich CIGS-type alloy at the inner surface of the via hole, forming a conductive path between at least a portion of front-contact and a portion of back-contact layers, forming a bump-shaped raised portion at the surface of the front-contact layer, forming a raised portion of the back-contact layer, and optionally forming a raised portion of copper-rich CIGS-type alloy covering a portion of the front-contact layer. A thin-film CIGS device includes at least one line segment via hole obtainable by the method.

Abstract: A thin-film optoelectronic module device (100) and design method comprising at least three monolithically-interconnected cells (104, 106, 108) where at least one monolithically-interconnecting line (250) depicts a spatial periodic or quasi-periodic wave and wherein the optoelectronic surface of said thin-film optoelectronic module device (100) presents at least one set of at least three zones (210, 220, 230) having curves of substantially parallel monolithic interconnect lines. Border zones (210, 230) have a lower front-contact sheet resistance than that of internal zone (220). Said curves of substantially parallel interconnecting lines may comprise peaks of triangular or rounded shape, additional spatial periods that are smaller than a baseline period, and mappings from one curve to the adjacent curve such as in the case of non-rectangular module devices (100).

Abstract: A method for vias and monolithic interconnects in thin-film optoelectronic devices (100, 200) wherein at least one line segment via hole (163, 165, 165?, 167) is formed by laser drilling and passes through front-contact layers (150, 152, 154, 156, 158) and semiconductive active layer (130), and wherein laser drilling causes forming a CIGS-type wall (132, 134, 136, 138) of electrically conductive permanently metalized copper-rich CIGS-type alloy at the inner surface (135) of the via hole, thereby forming a conductive path between at least a portion of front-contact and a portion of back-contact layers (120, 124, 126, 128, 129), forming a bump-shaped raised portion (155) at the surface of the front-contact layer, forming a raised portion (125, 127, 127?) of the back-contact layer, and optionally forming a raised portion of copper-rich CIGS-type alloy (155?) covering a portion of the front-contact layer (150). A thin-film CIGS device comprises at least one line segment via hole obtainable by the method.

Abstract: A thin-film optoelectronic module device (100) and design method comprising at least three monolithically-interconnected cells (104, 106, 108) where at least one monolithically-interconnecting line (250) depicts a spatial periodic or quasi-periodic wave and wherein the optoelectronic surface of said thin-film optoelectronic module device (100) presents at least one set of at least three zones (210, 220, 230) having curves of substantially parallel monolithic interconnect lines. Border zones (210, 230) have a lower front-contact sheet resistance than that of internal zone (220). Said curves of substantially parallel interconnecting lines may comprise peaks of triangular or rounded shape, additional spatial periods that are smaller than a baseline period, and mappings from one curve to the adjacent curve such as in the case of non-rectangular module devices (100).

Abstract: A thin-film optoelectronic module device (100) and design method comprising at least three monolithically-interconnected cells (104, 106, 108) where at least one monolithically-interconnecting line (250) depicts a spatial periodic or quasi-periodic wave and wherein the optoelectronic surface of said thin-film optoelectronic module device (100) presents at least one set of at least three zones (210, 220, 230) having curves of substantially parallel monolithic interconnect lines. Border zones (210, 230) have a lower front-contact sheet resistance than that of internal zone (220). Said curves of substantially parallel interconnecting lines may comprise peaks of triangular or rounded shape, additional spatial periods that are smaller than a baseline period, and mappings from one curve to the adjacent curve such as in the case of non-rectangular module devices (100).

Abstract: A method for vias and monolithic interconnects in thin-film optoelectronic devices (100, 200) wherein at least one line segment via hole (163, 165, 165?, 167) is formed by laser drilling and passes through front-contact layers (150, 152, 154, 156, 158) and semiconductive active layer (130), and wherein laser drilling causes forming a CIGS-type wall (132, 134, 136, 138) of electrically conductive permanently metalized copper-rich CIGS-type alloy at the inner surface (135) of the via hole, thereby forming a conductive path between at least a portion of front-contact and a portion of back-contact layers (120, 124, 126, 128, 129), forming a bump-shaped raised portion (155) at the surface of the front-contact layer, forming a raised portion (125, 127, 127?) of the back-contact layer, and optionally forming a raised portion of copper-rich CIGS-type alloy (155?) covering a portion of the front-contact layer (150). A thin-film CIGS device comprises at least one line segment via hole obtainable by the method.

Abstract: A thin-film optoelectronic module device (100) and design method comprising at least three monolithically-interconnected cells (104, 106, 108) where at least one monolithically-interconnecting line (250) depicts a spatial periodic or quasi-periodic wave and wherein the optoelectronic surface of said thin-film optoelectronic module device (100) presents at least one set of at least three zones (210, 220, 230) having curves of substantially parallel monolithic interconnect lines. Border zones (210, 230) have a lower front-contact sheet resistivity than th at of internal zone (220). Said curves of substantially parallel interconnecting lines may comprise peaks of triangular or rounded shape, additional spatial periods that are smaller than a baseline period, and mappings from one curve to the adjacent curve such as in the case of non-rectangular module devices (100).

Abstract: A method to fabricate monolithically-integrated optoelectronic module apparatuses (100) comprising at least two series-interconnected optoelectronic components (104, 106, 108). The method includes deposition and scribing on an insulating substrate or superstate (110) of a 3-layer stack in order (a, b, c) or (c, b, a) comprising: (a) back-contact electrodes (122, 124, 126, 128), (b) semiconductive layer (130), and (c) front-contact components (152, 154, 156, 158). Via holes (153, 155, 157) are drilled so that heat of the drilling process causes a metallization at the surface of said via holes that renders conductive the semi-conductive layer's surface (132, 134, 136, 138) of said via holes, thereby establishing series-interconnecting electrical paths between optoelectronic components (104, 106, 108) by connecting first front-contact components (154, 156) to second back-contact electrodes (124, 126).

Abstract: A method to fabricate monolithically-integrated optoelectronic module apparatuses (100) comprising at least two series-interconnected optoelectronic components (104, 106, 108). The method includes deposition and scribing on an insulating substrate or superstate (110) of a 3-layer stack in order (a, b, c) or (c, b, a) comprising: (a) back-contact electrodes (122, 124, 126, 128), (b) semiconductive layer (130), and (c) front-contact components (152, 154, 156, 158). Via holes (153, 155, 157) are drilled so that heat of the drilling process causes a metallization at the surface of said via holes that renders conductive the semi-conductive layer's surface (132, 134, 136, 138) of said via holes, thereby establishing series-interconnecting electrical paths between optoelectronic components (104, 106, 108) by connecting first front-contact components (154, 156) to second back-contact electrodes (124, 126).