Patents by Inventor Roh Tae Moon

Roh Tae Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabricating power semiconductor device having trench gate structure
    Patent number: 6852597
    Abstract: A method for fabricating a power semiconductor device having a trench gate structure is provided. An epitaxial layer of a first conductivity type having a low concentration and a body region of a second conductivity type are sequentially formed on a semiconductor substrate of the first conductivity type having a high concentration. An oxide layer pattern is formed on the body region. A first trench is formed using the oxide layer pattern as an etching mask to perforate a predetermined portion of the body region having a first thickness. A body contact region of the second conductivity type having a high concentration is formed to surround the first trench by impurity ion implantation using the oxide layer pattern as an ion implantation mask. First spacer layers are formed to cover the sidewalls of the first trench and the sidewalls of the oxide layer pattern.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: February 8, 2005
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Il-Yong Park, Jong Dae Kim, Sang Gi Kim, Jin Gun Koo, Dae Woo Lee, Roh Tae Moon, Yang Yil Suk
  • Method for fabricating power semiconductor device having trench gate structure
    Publication number: 20030068864
    Abstract: A method for fabricating a power semiconductor device having a trench gate structure is provided. An epitaxial layer of a first conductivity type having a low concentration and a body region of a second conductivity type are sequentially formed on a semiconductor substrate of the first conductivity type having a high concentration. An oxide layer pattern is formed on the body region. A first trench is formed using the oxide layer pattern as an etching mask to perforate a predetermined portion of the body region having a first thickness. A body contact region of the second conductivity type having a high concentration is formed to surround the first trench by impurity ion implantation using the oxide layer pattern as an ion implantation mask. First spacer layers are formed to cover the sidewalls of the first trench and the sidewalls of the oxide layer pattern.
    Type: Application
    Filed: February 8, 2002
    Publication date: April 10, 2003
    Inventors: Park Il-Yong, Kim Jong Dae, Kim Sang Gi, Koo Jin Gun, Lee Dae Woo, Roh Tae Moon, Yang Yil Suk