Abstract: Techniques for quality of service (QoS) support for input/output devices and other agents are described. In embodiments, a system includes execution circuitry to execute a plurality of software threads; hardware to monitor or control allocating, among the plurality of software threads, one or more shared resources; and storage to store a data structure to configure and enable monitoring or allocating of the one or more shared resources among the plurality of software threads and one or more channels through which one or more devices are to be connected to the one or more shared resources, the data structure to define one or more resource management domains in the system and which one or more devices are included in which one or more resource management domains.

Abstract: Examples include an apparatus having a plurality of clusters of processor cores; a plurality of memory bandwidth allocators, at least one of the plurality of memory bandwidth allocators per cluster, to apply memory bandwidth settings to one or more processor cores of an associated cluster to dynamically adjust priorities of memory bandwidth allocated for one or more workloads to be processed by the one or more processor cores of the associated cluster; a plurality of memory controllers, at least one of the plurality of memory controllers per cluster of processor cores; a plurality of performance monitors, at least one of the plurality of performance monitors per cluster, to generate performance monitoring statistics by monitoring performance of the one or more workloads by one or more processor cores based at least in part on performance monitoring configuration parameters; and a hardware dynamic resource controller configurable into a plurality of virtual dynamic resource controllers, wherein one virtual dyn

Abstract: Enforcement of maximum memory access latency for virtual machine instances is described. An example of a computer-readable storage medium includes instructions to implement operation of multiple virtual machines (VMs) in a cloud computing system; monitor operation of the VMs in processing a set of active workloads, including monitoring of memory access latency for the VMs using a dynamic resource controller, the dynamic resource controller comprising hardware circuitry to monitor memory bandwidth usage; and, upon detecting memory access in the cloud computing system reaching a memory bandwidth setpoint, implementing memory access throttling of one or more of the set of active workloads for the plurality of VMs, and allocating memory bandwidth to the active workloads according to a distribution algorithm.

Abstract: An embodiment may involve determining that a first logical partition of a scratchpad memory coupled to a processor core is empty and a first application is scheduled to execute; instructing a direct memory access (DMA) engine to load the first application into the first logical partition and then instructing the processor core to execute the first application from the first logical partition; while the first application is being executed from the first logical partition, determining that a second logical partition of the scratchpad memory is empty and a second application is scheduled to execute; instructing the DMA engine to load the second application into the second logical partition; determining that execution of the first application has completed; and instructing the DMA engine to unload the first application from the first logical partition and instructing the processor core to execute the second application from the second logical partition.

Abstract: An embodiment may involve determining that a first logical partition of a scratchpad memory coupled to a processor core is empty and a first application is scheduled to execute; instructing a direct memory access (DMA) engine to load the first application into the first logical partition and then instructing the processor core to execute the first application from the first logical partition; while the first application is being executed from the first logical partition, determining that a second logical partition of the scratchpad memory is empty and a second application is scheduled to execute; instructing the DMA engine to load the second application into the second logical partition; determining that execution of the first application has completed; and instructing the DMA engine to unload the first application from the first logical partition and instructing the processor core to execute the second application from the second logical partition.