Patents by Inventor Rohit A. Shetty

Rohit A. Shetty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170372371
    Abstract: An approach is provided for managing a contact with an inactive customer. After grouping customers into active and inactive customers, the active customers are grouped according to activity segments corresponding to a level and style of activity. Personality traits, values, and needs of the active customers are determined. A mapping between the personality traits, values, and needs of the active customers and the activity segments is generated. Personality traits, values, and needs of an inactive customer are determined. Using the mapping and based on the personality traits, values, and needs of the inactive customer, an activity segment in which the inactive customer likely belongs is determined. Action(s) corresponding to the active customers in the determined activity segment are selected. The action(s) are applied to the inactive customer to increase a likelihood of the inactive customer becoming engaged in an activity similar to activities performed by the active customers.
    Type: Application
    Filed: June 23, 2016
    Publication date: December 28, 2017
    Inventors: Chitra Dorai, Julian A. McIntosh, Sreeranjini R. Seetharam, Rohit A. Shetty
  • Patent number: 8934312
    Abstract: Aspects of the invention provide for a structure and method for determining a degree of process variation skew between a plurality of bit cells in a static random-access-memory (SRAM) column architecture. In one embodiment, a structure includes: a plurality of bit cells within a static random access memory (SRAM) column architecture; a digital-to-analog converter (DAC) connected to the bit cells through a pair of multiplexers; and a pre-charge circuit connected to the bit cells through the pair of multiplexers, wherein the DAC and the pre-charge circuit control and test the bit cells to determine a degree of process variation skew between each of the bit cells.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: January 13, 2015
    Assignee: International Business Machines Corporation
    Inventors: Albert M. Chu, Daryl M. Seitzer, Rohit A. Shetty
  • Publication number: 20140211581
    Abstract: Aspects of the invention provide for a structure and method for determining a degree of process variation skew between a plurality of bit cells in a static random-access-memory (SRAM) column architecture. In one embodiment, a structure includes: a plurality of bit cells within a static random access memory (SRAM) column architecture; a digital-to-analog converter (DAC) connected to the bit cells through a pair of multiplexers; and a pre-charge circuit connected to the bit cells through the pair of multiplexers, wherein the DAC and the pre-charge circuit control and test the bit cells to determine a degree of process variation skew between each of the bit cells.
    Type: Application
    Filed: January 30, 2013
    Publication date: July 31, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Albert M. Chu, Daryl M. Seitzer, Rohit A. Shetty
  • Patent number: 8576526
    Abstract: Aspects of the invention provide an electrostatic discharge (ESD) protection device with reduced current leakage, and a related method. In one embodiment, an ESD protection device for an integrated circuit (IC) is provided. The ESD protection device includes: a resistor-capacitor (RC) timing circuit for selectively turning on the ESD protection device during an ESD event; a trigger circuit for receiving an output of the RC timing circuit and generating a trigger pulse for driving at least one of: a first ESD clamp and a second ESD clamp; and a selection circuit for selecting one of: the trigger circuit or a charge pump for controlling the second ESD clamp.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: November 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Albert M. Chu, Mujahid Muhammad, Daryl M. Seitzer, Rohit A. Shetty
  • Publication number: 20130215539
    Abstract: Aspects of the invention provide an electrostatic discharge (ESD) protection device with reduced current leakage, and a related method. In one embodiment, an ESD protection device for an integrated circuit (IC) is provided. The ESD protection device includes: a resistor-capacitor (RC) timing circuit for selectively turning on the ESD protection device during an ESD event; a trigger circuit for receiving an output of the RC timing circuit and generating a trigger pulse for driving at least one of: a first ESD clamp and a second ESD clamp; and a selection circuit for selecting one of: the trigger circuit or a charge pump for controlling the second ESD clamp.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 22, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Albert M. Chu, Mujahid Muhammad, Daryl M. Seitzer, Rohit A. Shetty