Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a logic circuit, a first comparator, a second comparator, and an AND logic circuit. The logic circuit has an output and the first comparator has a first input coupled to an input voltage (VIN) pin, a second input configured to receive a Vin under voltage lockout (VINUVLO) threshold value, and an output. The second comparator has a first input coupled to a power middle (PMID) pin, a second input coupled to a battery pin, and an output and the AND logic circuit has a first input coupled to the output of the logic circuit, a second input coupled to the output of the first comparator, a third input coupled to the output of the second comparator, and an output coupled to an input of a field-effect transistor (FET) control circuit.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a logic circuit, a first comparator, a second comparator, and an AND logic circuit. The logic circuit has an output and the first comparator has a first input coupled to an input voltage (VIN) pin, a second input configured to receive a Vin under voltage lockout (VINUVLO) threshold value, and an output. The second comparator has a first input coupled to a power middle (PMID) pin, a second input coupled to a battery pin, and an output and the AND logic circuit has a first input coupled to the output of the logic circuit, a second input coupled to the output of the first comparator, a third input coupled to the output of the second comparator, and an output coupled to an input of a field-effect transistor (FET) control circuit.

Abstract: An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

Abstract: A battery charger includes a battery power regulator configured to set a charge signal provided to a battery based on a charge control signal and charge enable signal. The battery charger also includes a controller configured to provide the charge control signal to the battery power regulator. The controller is also configured to temporarily de-assert the charge enable signal for a predetermined amount of time in response to determining that a change is needed in the charge control signal. The controller is further configured to re-assert the charge enable signal after the predetermined amount of time.

Abstract: A battery charger includes a battery power regulator configured to set a charge signal provided to a battery based on a charge control signal and charge enable signal. The battery charger also includes a controller configured to provide the charge control signal to the battery power regulator. The controller is also configured to temporarily de-assert the charge enable signal for a predetermined amount of time in response to determining that a change is needed in the charge control signal. The controller is further configured to re-assert the charge enable signal after the predetermined amount of time.

Abstract: Aspects of the present disclosure provide for circuit. In at least some examples, the circuit includes a controller, a current source, a switch, and a digital-to-analog converter (DAC). The controller includes an analog-to-digital converter (ADC) having an input and an output, a first register, and a second register coupled to the output of the ADC. The switch is coupled between an output of the current source and a first node and has a control terminal coupled to the controller. The first node is coupled to the input of the ADC and is configured to couple to a resistor. The DAC has an input coupled to the controller and an output configured to couple to a battery.

Abstract: A system includes an adapter port and a control circuit coupled to the adapter port. The system also includes host hardware coupled to the control circuit. The control circuit is configured to reset the host hardware in response to detecting an adapter removal pattern at the adapter port.

Abstract: An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

Abstract: An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

Abstract: Aspects of the present disclosure provide for circuit. In at least some examples, the circuit includes a controller, a current source, a switch, and a digital-to-analog converter (DAC). The controller includes an analog-to-digital converter (ADC) having an input and an output, a first register, and a second register coupled to the output of the ADC. The switch is coupled between an output of the current source and a first node and has a control terminal coupled to the controller. The first node is coupled to the input of the ADC and is configured to couple to a resistor. The DAC has an input coupled to the controller and an output configured to couple to a battery.

Abstract: A system includes an adapter port and a control circuit coupled to the adapter port. The system also includes host hardware coupled to the control circuit. The control circuit is configured to reset the host hardware in response to detecting an adapter removal pattern at the adapter port.

Abstract: An example device comprises a digital-to-analog converter (DAC) comprising first and second transistors coupled to a first amplifier, the second transistor coupled to a first output of the DAC and to an output of the first amplifier, and third and fourth transistors coupled to the first amplifier and to a second output of the DAC, the third and fourth transistors switchably coupled to a voltage supply and to the first transistor. The device also comprises a first node coupled to the first output of the DAC and to a resistor. The device further includes a second node coupled to the second output of the DAC, and a second amplifier coupled to the second node and to the first transistor and switchably coupled to the third and fourth transistors. The device also comprises a comparator coupled to the first node.

Abstract: A battery charger includes a battery power regulator configured to set a charge signal provided to a battery based on a charge control signal and charge enable signal. The battery charger also includes a controller configured to provide the charge control signal to the battery power regulator. The controller is also configured to temporarily de-assert the charge enable signal for a predetermined amount of time in response to determining that a change is needed in the charge control signal. The controller is further configured to re-assert the charge enable signal after the predetermined amount of time.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a logic circuit, a first comparator, a second comparator, and an AND logic circuit. The logic circuit has an output and the first comparator has a first input coupled to an input voltage (VIN) pin, a second input configured to receive a Vin under voltage lockout (VINUVLO) threshold value, and an output. The second comparator has a first input coupled to a power middle (PMID) pin, a second input coupled to a battery pin, and an output and the AND logic circuit has a first input coupled to the output of the logic circuit, a second input coupled to the output of the first comparator, a third input coupled to the output of the second comparator, and an output coupled to an input of a field-effect transistor (FET) control circuit.

Abstract: Aspects of the present disclosure provide for a circuit, comprising a first node configured to couple to a first current source and a second current source. The circuit also comprises a first filter configured to couple between a voltage supply and the first node, the first filter being a first dynamically controllable current filter. The circuit further comprises a current mirror coupled between the first node and a second node configured to couple to a third current source and a fourth current source. The circuit additionally comprises a second filter configured to couple between the second node and a ground node, the second filter being a second dynamically controllable current filter.